VERIFICATION AND VALIDATION OF THE REAL TIME SYSTEM IN THE RADAR SENSOR

Naibin Li

2005

Abstract

This paper presents the modeling, simulation and verification of the embedded real time system for the memory interface system based on the tool UPPAAl. The real time system of the memory interface in the radar sensor is the arbiter as the kernel of the non-preemptive, fix cycle, round-robin schedule controls and schedules four input buffers, the five output buffers and two integrators working synchronously to share the system resource. We construct accurately dynamic model as the networks of timed automata with rigorous logic and real timed abstraction of this real time system, this hybrid system with discrete and continuous state change consists of six process templates and 20 concurrent processes. We simulate and verify the entire system to detect potential fault in order to guarantee the reliability of the design of the real time system.

Paper Citation

in Harvard Style

Li N. (2005). VERIFICATION AND VALIDATION OF THE REAL TIME SYSTEM IN THE RADAR SENSOR . In Proceedings of the Seventh International Conference on Enterprise Information Systems - Volume 3: ICEIS, ISBN 972-8865-19-8, pages 421-424. DOI: 10.5220/0002544804210424

in Bibtex Style

@conference{iceis05,
author={Naibin Li},
title={VERIFICATION AND VALIDATION OF THE REAL TIME SYSTEM IN THE RADAR SENSOR},
booktitle={Proceedings of the Seventh International Conference on Enterprise Information Systems - Volume 3: ICEIS,},
year={2005},
pages={421-424},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0002544804210424},
isbn={972-8865-19-8},
}

in EndNote Style

TY - CONF
JO - Proceedings of the Seventh International Conference on Enterprise Information Systems - Volume 3: ICEIS,
TI - VERIFICATION AND VALIDATION OF THE REAL TIME SYSTEM IN THE RADAR SENSOR
SN - 972-8865-19-8
AU - Li N.
PY - 2005
SP - 421
EP - 424
DO - 10.5220/0002544804210424