Dariusz Kościelnik, Marek Miśkowicz


A challenging problem of today’s ADC design is a development of low voltage, low power and possibly high performance converters. The ever growing demand for decreasing the supply voltage of semiconductor devices due to scaling the feature size of VLSI technology has pushed the design of analog integrated circuit to its limits. The same problem concerns the analog-to-digital converters since lowering supply voltage results in a reduction of a voltage increment corresponding to the least significant bit (LSB) in signal amplitude quantization. In the paper, an important alternative to conventional ADCs is presented. To overcome problems with decreasing accuracy of amplitude quantization, a new class of asynchronous ADCs is discussed where the mapping of an analog signal into time domain rather than into amplitude domain is used. The asynchronous ADCs are not controlled by any global clock but self-timed. The local reference clock is used only to quantize time intervals that represent the converted signal amplitude. The design of asynchronous Sigma-Delta analog-to-digital converter (ASD-ADC) with serial output interface is discussed in details. The ASD-ADC together with the loss-free asynchronous analog signal recovery method developed recently provides possibility to establish the asynchronous digital signal processing chain.


  1. Matsuzawa, A., 2007, Design challenges of analog-todigital converters in nanoscale CMOS, IEICE Trans. Electron., vol. E90-C, no 4, pp. 779-85.
  2. Yang, H.Y., Sarpeshkar, R., 2006, A Bio-Inspired UltraEnergy-Efficient Analog-to-Digital Converter for Biomedical Applications, IEEE Trans. on Circuits and Systems-I, vol. 53, no 11, pp. 2349-2356.
  3. Yang, H.Y., Sarpeshkar, R., 2005, A time-based energyefficient analog-to-digital converter, IEEE Journal of Solid-State Circuits, vol. 40, no 8, pp. 1590-1601.
  4. Sayiner, N., Sorensen, H.V., Viswanathan, T.R., 1996, A level-crossing sampling scheme for A/D conversion, IEEE Trans. on Circuits and Systems II, vol. 43, no 4, pp. 335-9.
  5. Roza, E., 1997, Analog-to-digital conversion via dutycycle modulation, IEEE Trans. on Circuits and Systems-II, vol. 44, no 11, pp. 907-914.
  6. Kinniment, D., Yakovlev, A., Gao B., 2000, Synchronous and asynchronous A-D conversion, IEEE Trans. on VLSI Systems, vol. 8, no 2, pp. 217-220.
  7. Allier, E., Sicard, G., Fesquet L., Renaudin, M., 2003, A new class of asynchronous A/D converters based on time quantization”, In ASYNC'03, IEEE Intern. Symposium on Asynchronous Circuits and Systems, pp. 196-205.
  8. Allier, E., Goulier, J., Sicard, G., Dezzani, A., André, E., Renaudin, M., 2005, A 120nm low power asynchronous ADC, In ISLPED 2005, International Symposium on Low Power Electronics and Design, pp. 60-65.
  9. Miskowicz, M., 2006, Send-on-delta concept: an eventbased data reporting strategy, Sensors, vol. 6, no 1, pp. 49-63.
  10. Akopyan, F., Manohar, R., Apsel, A. B., 2006, A levelcrossing flash asynchronous analog-to-digital converter, In ASYNC'06, IEEE International Symposium on Asynchronous Circuits and Systems, pp. 12-22.
  11. Koscielnik, D., Miskowicz, M., 2008, Asynchronous Sigma-Delta analog-to digital converter based on the charge pump integrator, Analog Integrated Circuits & Signal Processing, vol. 55, no 3, pp. 223-238.
  12. Lazar, A.A., Tóth, L.T., 2005, Perfect recovery and sensitivity analysis of time encoded bandlimited signals, IEEE Trans. on Circuits and Systems-I, vol. 51, no 10, pp. 2060-2073.
  13. Verissimo P., Rodrigues L., 2001, Distributed Systems for System Architects, Kluwer Academic Publishers.
  14. Kaldy, C., Lazar, A.A., Simonyi, E.K., Toth, Laszlo T., 2007, Time Encoded Communications for Human Area Network Biomonitoring, Technical Report, Department of Electrical Engineering, Columbia University.

Paper Citation

in Harvard Style

Kościelnik D. and Miśkowicz M. (2009). TOWARDS ASYNCHRONOUS SIGNAL PROCESSING . In Proceedings of the 6th International Conference on Informatics in Control, Automation and Robotics - Volume 2: ICINCO, ISBN 978-989-674-001-6, pages 178-183. DOI: 10.5220/0002251101780183

in Bibtex Style

author={Dariusz Kościelnik and Marek Miśkowicz},
booktitle={Proceedings of the 6th International Conference on Informatics in Control, Automation and Robotics - Volume 2: ICINCO,},

in EndNote Style

JO - Proceedings of the 6th International Conference on Informatics in Control, Automation and Robotics - Volume 2: ICINCO,
SN - 978-989-674-001-6
AU - Kościelnik D.
AU - Miśkowicz M.
PY - 2009
SP - 178
EP - 183
DO - 10.5220/0002251101780183