EMPLOYING MULTI-CORE PROCESSOR ARCHITECTURES TO ACCELERATE JAVA CRYPTOGRAPHY EXTENSIONS

Mario Ivkovic, Thomas Zefferer

Abstract

For many years, the increase of clock frequencies has been the preferred approach to raise computational power. Due to physical limitations and cost-effectiveness reasons, hardware vendors were forced to change their strategy. Instead of increasing clock frequencies, processors are nowadays supplied with a growing number of independent cores to increase the overall computational power. This major paradigm shift needs to be considered in software design processes as well. Software needs to be parallelized to exploit the full computing power provided by multi-core architectures. Due to their intrinsic computational complexity, cryptographic algorithms require efficient implementations. On multi-core architectures this comprises the need for parallelism and concurrent execution. To meet this challenge, we have enhanced an existing JavaTM based cryptographic library by parallelizing a subset of its algorithms. Made measurements have shown speed-ups from 1.35 up to 1.78 resulting from the applied modifications. In this paper we show that regardless of their complexity, several cryptographic algorithms can be parallelized to a certain extent with reasonable effort. The applied parallelization of the JavaTM based cryptographic library has significantly enhanced its performance on multi-core architectures and has therefore made a valuable contribution to its sustainability.

References

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Paper Citation


in Harvard Style

Ivkovic M. and Zefferer T. (2011). EMPLOYING MULTI-CORE PROCESSOR ARCHITECTURES TO ACCELERATE JAVA CRYPTOGRAPHY EXTENSIONS . In Proceedings of the 7th International Conference on Web Information Systems and Technologies - Volume 1: WEBIST, ISBN 978-989-8425-51-5, pages 5-12. DOI: 10.5220/0003339000050012


in Bibtex Style

@conference{webist11,
author={Mario Ivkovic and Thomas Zefferer},
title={EMPLOYING MULTI-CORE PROCESSOR ARCHITECTURES TO ACCELERATE JAVA CRYPTOGRAPHY EXTENSIONS},
booktitle={Proceedings of the 7th International Conference on Web Information Systems and Technologies - Volume 1: WEBIST,},
year={2011},
pages={5-12},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0003339000050012},
isbn={978-989-8425-51-5},
}


in EndNote Style

TY - CONF
JO - Proceedings of the 7th International Conference on Web Information Systems and Technologies - Volume 1: WEBIST,
TI - EMPLOYING MULTI-CORE PROCESSOR ARCHITECTURES TO ACCELERATE JAVA CRYPTOGRAPHY EXTENSIONS
SN - 978-989-8425-51-5
AU - Ivkovic M.
AU - Zefferer T.
PY - 2011
SP - 5
EP - 12
DO - 10.5220/0003339000050012