Simulation of Real-time Multiprocessor Scheduling with Overheads

Maxime Chéramy, Anne-Marie Déplanche, Pierre-Emmanuel Hladik

Abstract

Numerous scheduling algorithms were and still are designed in order to handle multiprocessor architectures, raising new issues due to the complexity of such architectures. Moreover, evaluating them is difficult without a real and complex implementation. Thus, this paper presents a tool that intends to facilitate the study of schedulers by providing an easy way of prototyping. Compared to the other scheduling simulators, this tool takes into account the impact of the caches through statistical models and includes direct overheads such as context switches and scheduling decisions.

References

  1. Anderson, J., Calandrino, J., and Devi, U. (2006). Realtime scheduling on multicore platforms. In Proc. of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS).
  2. Babka, V., Libic?, P., Martinec, T., and T u°ma, P. (2012). On the accuracy of cache sharing models. In Proc. of the third joint WOSP/SIPEW International Conference on Performance Engineering (ICPE).
  3. Bastoni, A., Brandenburg, B., and Anderson, J. (2010). An empirical comparison of global, partitioned, and clustered multiprocessor edf schedulers. In Proc. of the IEEE 31st Real-Time Systems Symposium (RTSS).
  4. Bastoni, A., Brandenburg, B., and Anderson, J. (2011). Is semi-partitioned scheduling practical? In Proc. of the 23rd Euromicro Conference on Real-Time Systems (ECRTS).
  5. Berna, B. and Puaut, I. (2012). Pdpa: period driven task and cache partitioning algorithm for multi-core systems. In Proc. of the 20th International Conference on RealTime and Network Systems (RTNS).
  6. Binkert, N., Beckmann, B., Black, G., Reinhardt, S. K., Saidi, A., Basu, A., Hestness, J., Hower, D. R., Krishna, T., Sardashti, S., Sen, R., Sewell, K., Shoaib, M., Vaish, N., Hill, M. D., and Wood, D. A. (2011). The gem5 simulator. SIGARCH Computer Architecture News.
  7. Calandrino, J. M., Leontyev, H., Block, A., Devi, U. C., and Anderson, J. H. (2006). LitmusRT : A testbed for empirically comparing real-time multiprocessor schedulers. In Proc. of the 27th IEEE International RealTime Systems Symposium (RTSS).
  8. Chandarli, Y., Fauberteau, F., Masson, D., Midonnet, S., and Qamhieh, M. (2012). Yartiss: A tool to visualize, test, compare and evaluate real-time scheduling algorithms. In 3rd International Workshop on Analysis Tools and Methodologies for Embedded and Realtime Systems (WATERS).
  9. Chandra, D., Guo, F., Kim, S., and Solihin, Y. (2005). Predicting inter-thread cache contention on a chip multiprocessor architecture. In Proc. of the 11th International Symposium on High-Performance Computer Architecture (HPCA).
  10. Davis, R. I. and Burns, A. (2011). A survey of hard realtime scheduling for multiprocessor systems. ACM Computing Surveys, 43(4).
  11. Devi, U. and Anderson, J. (2005). Tardiness bounds under global edf scheduling on a multiprocessor. In Proc. of the 26th IEEE Real-Time Systems Symposium (RTSS).
  12. Eklov, D., Black-Schaffer, D., and Hagersten, E. (2011). Fast modeling of shared caches in multicore systems. In Proc. of the 6th International Conference on High Performance and Embedded Architectures and Compilers (HiPEAC).
  13. Eklov, D. and Hagersten, E. (2010). StatStack: efficient modeling of LRU caches. In Proc. of the IEEE International Symposium on Performance Analysis of Systems Software (ISPASS).
  14. Fedorova, A., Seltzer, M., and Smith, M. (2006). Cachefair thread scheduling for multicore processors. Technical Report TR-17-06, Division of Engineering and Applied Sciences, Harvard University.
  15. Guan, N., Stigge, M., Yi, W., and Yu, G. (2009). Cacheaware scheduling and analysis for multicores. In Proc. of the 7th ACM international conference on Embedded Software (EMSOFT).
  16. Guthaus, M., Ringenberg, J., Ernst, D., Austin, T., Mudge, T., and Brown, R. (2001). Mibench: A free, commercially representative embedded benchmark suite. In Proc. of the IEEE International Workshop on Workload Characterization (WWC-4).
  17. Harbour, M. G., García, J. J. G., Gutiérrez, J. C. P., and Moyano, J. M. D. (2001). Mast: Modeling and analysis suite for real time applications. In Proc. of the 13th Euromicro Conference on Real-Time Systems (ECRTS).
  18. Hoste, K. and Eeckhout, L. (2007). Microarchitectureindependent workload characterization. Micro, IEEE, 27(3).
  19. Liu, C. L. and Layland, J. (1973). Scheduling algorithms for multiprogramming in a hard-real-time environment. Journal of the ACM, 20.
  20. Liu, F., Guo, F., Solihin, Y., Kim, S., and Eker, A. (2008). Characterizing and modeling the behavior of context switch misses. In Proc. of the 17th international conference on Parallel architectures and compilation techniques (PACT).
  21. Magnusson, P., Christensson, M., Eskilson, J., Forsgren, D., Hallberg, G., Hogberg, J., Larsson, F., Moestedt, A., and Werner, B. (2002). Simics: A full system simulation platform. Computer, 35(2).
  22. Mattson, R., Gecsei, J., Slutz, D., and Traiger, I. (1970). Evaluation techniques for storage hierarchies. IBM Systems Journal, 9(2).
  23. Mogul, J. C. and Borg, A. (1991). The effect of context switches on cache performance. SIGOPS Oper. Systems Review, 25.
  24. Nelissen, G., Funk, S., and Goossens, J. (2012). Reducing preemptions and migrations in ekg. In IEEE 18th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA).
  25. Radenski, A. (2006). “python first”: a lab-based digital introduction to computer science. In Proc. of the 11th
  26. Rodríguez-Cayetano, M. (2011). Design and development of a cpu scheduler simulator for educational purposes using sdl. In System Analysis and Modeling: About Models. Springer Berlin / Heidelberg.
  27. Singhoff, F., Legrand, J., Nana, L., and Marcé, L. (2004). Cheddar: a flexible real time scheduling framework. Ada Lett., XXIV(4).
  28. Urunuela, R., Déplanche, A.-M., and Trinquet, Y. (2010). Storm a simulation tool for real-time multiprocessor scheduling evaluation. In Proc. of the Emerging Technologies and Factory Automation (ETFA).
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Paper Citation


in Harvard Style

Chéramy M., Déplanche A. and Hladik P. (2013). Simulation of Real-time Multiprocessor Scheduling with Overheads . In Proceedings of the 3rd International Conference on Simulation and Modeling Methodologies, Technologies and Applications - Volume 1: SIMULTECH, ISBN 978-989-8565-69-3, pages 5-14. DOI: 10.5220/0004455200050014


in Bibtex Style

@conference{simultech13,
author={Maxime Chéramy and Anne-Marie Déplanche and Pierre-Emmanuel Hladik},
title={Simulation of Real-time Multiprocessor Scheduling with Overheads},
booktitle={Proceedings of the 3rd International Conference on Simulation and Modeling Methodologies, Technologies and Applications - Volume 1: SIMULTECH,},
year={2013},
pages={5-14},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0004455200050014},
isbn={978-989-8565-69-3},
}


in EndNote Style

TY - CONF
JO - Proceedings of the 3rd International Conference on Simulation and Modeling Methodologies, Technologies and Applications - Volume 1: SIMULTECH,
TI - Simulation of Real-time Multiprocessor Scheduling with Overheads
SN - 978-989-8565-69-3
AU - Chéramy M.
AU - Déplanche A.
AU - Hladik P.
PY - 2013
SP - 5
EP - 14
DO - 10.5220/0004455200050014