Hardware In the Loop for VDM-Real Time Modeling of Embedded Systems

José Antonio Esparza Isasa, Peter Würtz Vinther Jørgensen, Peter Gorm Larsen


This paper introduces a generic solution for gradually moving from a model of an embedded system to include embedded hardware and software components into the simulation of the model. Our technique enables combined execution (co-execution) of system components models expressed in the VDM-RT formalism with actual hardware/software realizations through the application of Hardware In the Loop (HIL) simulation. Introducing such component realizations in the simulation increases the fidelity of the simulation outcome, thus enabling improved prediction of properties for the system realization.


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Paper Citation

in Harvard Style

Esparza Isasa J., Jørgensen P. and Larsen P. (2014). Hardware In the Loop for VDM-Real Time Modeling of Embedded Systems . In Proceedings of the 2nd International Conference on Model-Driven Engineering and Software Development - Volume 1: MODELSWARD, ISBN 978-989-758-007-9, pages 209-216. DOI: 10.5220/0004698902090216

in Bibtex Style

author={José Antonio Esparza Isasa and Peter Würtz Vinther Jørgensen and Peter Gorm Larsen},
title={Hardware In the Loop for VDM-Real Time Modeling of Embedded Systems},
booktitle={Proceedings of the 2nd International Conference on Model-Driven Engineering and Software Development - Volume 1: MODELSWARD,},

in EndNote Style

JO - Proceedings of the 2nd International Conference on Model-Driven Engineering and Software Development - Volume 1: MODELSWARD,
TI - Hardware In the Loop for VDM-Real Time Modeling of Embedded Systems
SN - 978-989-758-007-9
AU - Esparza Isasa J.
AU - Jørgensen P.
AU - Larsen P.
PY - 2014
SP - 209
EP - 216
DO - 10.5220/0004698902090216