FPGA Implementation of F2-Linear Pseudorandom Number Generators based on Zynq MPSoC: A Chaotic Iterations Post Processing Case Study

Bakiri Mohammed, Jean-François Couchot, Christophe Guyeux

Abstract

Pseudorandom number generation (PRNG) is a key element in hardware security platforms like fieldprogrammable gate array FPGA circuits. In this article, 18 PRNGs belonging in 4 families (xorshift, LFSR, TGFSR, and LCG) are physically implemented in a FPGA and compared in terms of area, throughput, and statistical tests. Two flows of conception are used for Register Transfer Level (RTL) and High-level Synthesis (HLS). Additionally, the relations between linear complexity, seeds, and arithmetic operations on the one hand, and the resources deployed in FPGA on the other hand, are deeply investigated. In order to do that, a SoC based on Zynq EPP with ARM Cortex-A9 MPSoC is developed to accelerate the implementation and the tests of various PRNGs on FPGA hardware. A case study is finally proposed using chaotic iterations as a post processing for FPGA. The latter has improved the statistical profile of a combination of PRNGs that, without it, failed in the so-called TestU01 statistical battery of tests.

References

  1. Bahi, J., Couturier, R., Guyeux, C., and Héam, P.-C. (2015). Efficient and cryptographically secure generation of chaotic pseudorandom numbers on gpu. The journal of Supercomputing, 71(10):3877-3903.
  2. Bahi, J., Guyeux, C., and Wang, Q. (2009). A novel pseudorandom generator based on discrete chaotic iterations. In INTERNET'09, 1-st Int. Conf. on Evolving Internet, pages 71-76, Cannes, France.
  3. Bahi, J. M., Fang, X., Guyeux, C., and Larger, L. (2013). Fpga design for pseudorandom number generator based on chaotic iteration used in information hiding application. Appl. Math, 7(6):2175-2188.
  4. Barker, E. and Roginsky, A. (2010). Draft NIST special publication 800-131 recommendation for the transitioning of cryptographic algorithms and key sizes.
  5. Blackburn, S., Carter, G., Gollmann, D., Murphy, S., Paterson, K., Piper, F., and Wild, P. (1994). Aspects of linear complexity. In Communications and Cryptography, pages 35-42. Springer.
  6. Cong, J., Liu, B., Neuendorffer, S., Noguera, J., Vissers, K., and Zhang, Z. (2011). High-level synthesis for fpgas: From prototyping to deployment. ComputerAided Design of Integrated Circuits and Systems, IEEE Transactions on, 30(4):473-491.
  7. Couture, R. and L'Ecuyer, P. (1997). Distribution properties of multiply-with-c arry random number generators. Mathematics of Computation of the American Mathematical Society, 66(218):591-607.
  8. Devaney, R. L. (2003). An Introduction to Chaotic Dynamical Systems, 2nd Edition. Westview Pr.
  9. Fang, X., Wang, Q., Guyeux, C., and Bahi, J. M. (2014). Fpga acceleration of a pseudorandom number generator based on chaotic iterations. Journal of Information Security and Applications, 19(1):78-87.
  10. Gentle, J. E. (2013). Random number generation and Monte Carlo methods. Springer Science & Business Media.
  11. Gleick, J. (1997). Chaos: Making a new science. Random House.
  12. Homsirikamol, E. and Gaj, K. (2015). Hardware benchmarking of cryptographic algorithms using high-level synthesis tools: The sha-3 contest case study. In Applied Reconfigurable Computing, pages 217-228. Springer.
  13. Knuth, D. E. (1997). The Art of Computer Programming, Volume 2 (3rd Ed.): Seminumerical Algorithms. Addison-Wesley Longman Publishing Co., Inc., Boston, MA, USA.
  14. L'Ecuyer, P. (1996). Maximally equidistributed combined tausworthe generators. Mathematics of Computation of the American Mathematical Society, 65(213):203- 213.
  15. L'Ecuyer, P. (1999a). Good parameters and implementations for combined multiple recursive random number generators. Operations Research, 47(1):159-164.
  16. L'Ecuyer, P. (1999b). Tables of maximally equidistributed combined lfsr generators. Mathematics of Computation of the American Mathematical Society, 68(225):261-269.
  17. L'Ecuyer, P. and Simard, R. (2007). Testu01: Ac library for empirical testing of random number generators. ACM Transactions on Mathematical Software (TOMS), 33(4):22.
  18. Luby, M. G. (1996). Pseudorandomness and cryptographic applications. Princeton University Press.
  19. Marsaglia, G. et al. (2003). Xorshift rngs. Journal of Statistical Software, 8(14):1-6.
  20. Matsumoto, M. and Kurita, Y. (1994). Twisted gfsr generators ii. ACM Transactions on Modeling and Computer Simulation (TOMACS), 4(3):254-266.
  21. Matsumoto, M. and Nishimura, T. (1998). Mersenne twister: a 623-dimensionally equidistributed uniform pseudo-random number generator. ACM Transactions on Modeling and Computer Simulation (TOMACS), 8(1):3-30.
  22. Meyer-Baese, U. and Meyer-Baese, U. (2007). Digital signal processing with field programmable gate arrays, volume 65. Springer.
  23. O'Neill, M. E. (1988). PCG: A family of simple fast space-efficient statistically good algorithms for random number generation.
  24. Panneton, F., L'Ecuyer, P., and Matsumoto, M. (2006). Improved long-period generators based on linear recurrences modulo 2. ACM Transactions on Mathematical Software (TOMS), 32(1):1-16.
  25. Rajagopalan, V., Boppana, V., Dutta, S., Taylor, B., and Wittig, R. (2011). Xilinx zynq-7000 epp-an extensible processing platform family. In 23rd Hot Chips Symposium, pages 1352-1357.
  26. Rueppel, R. A. (1985). Linear complexity and random sequences. In Advances in CryptologyEUROCRYPT85, pages 167-188. Springer.
  27. Thomas, D. B. and Luk, W. (2013). The lut-sr family of uniform random number generators for fpga architectures. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 21(4):761-770.
  28. Vigna, S. (2014a). An experimental exploration of marsaglia's xorshift generators, scrambled. arXiv preprint arXiv:1402.6246.
  29. Vigna, S. (2014b). Further scramblings of marsaglia's xorshift generators. arXiv preprint arXiv:1404.0390.
  30. Zepernick, H.-J. and Finger, A. (2013). Pseudo random signal processing: theory and application. John Wiley & Sons.
Download


Paper Citation


in Harvard Style

Mohammed B., Couchot J. and Guyeux C. (2016). FPGA Implementation of F2-Linear Pseudorandom Number Generators based on Zynq MPSoC: A Chaotic Iterations Post Processing Case Study . In Proceedings of the 13th International Joint Conference on e-Business and Telecommunications - Volume 4: SECRYPT, (ICETE 2016) ISBN 978-989-758-196-0, pages 302-309. DOI: 10.5220/0005967903020309


in Bibtex Style

@conference{secrypt16,
author={Bakiri Mohammed and Jean-François Couchot and Christophe Guyeux},
title={FPGA Implementation of F2-Linear Pseudorandom Number Generators based on Zynq MPSoC: A Chaotic Iterations Post Processing Case Study},
booktitle={Proceedings of the 13th International Joint Conference on e-Business and Telecommunications - Volume 4: SECRYPT, (ICETE 2016)},
year={2016},
pages={302-309},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0005967903020309},
isbn={978-989-758-196-0},
}


in EndNote Style

TY - CONF
JO - Proceedings of the 13th International Joint Conference on e-Business and Telecommunications - Volume 4: SECRYPT, (ICETE 2016)
TI - FPGA Implementation of F2-Linear Pseudorandom Number Generators based on Zynq MPSoC: A Chaotic Iterations Post Processing Case Study
SN - 978-989-758-196-0
AU - Mohammed B.
AU - Couchot J.
AU - Guyeux C.
PY - 2016
SP - 302
EP - 309
DO - 10.5220/0005967903020309