Authors:
Luigi C. Viagrande
1
;
2
;
Filippo L. M. Milotta
1
;
2
;
Paola Giuffrè
1
;
Giuseppe Bruno
1
;
Daniele Vinciguerra
1
and
Giovanni Gallo
2
Affiliations:
1
STMicroelectronics, Catania, Italy
;
2
University of Catania, Catania, Italy
Keyword(s):
Semiconductor Manufacturing, Electrical Wafer Sorting Map, Wafer Map Clustering, Anomalies Signature Classification, Yield Analysis.
Abstract:
We focused onto a very specific kind of data from semiconductor manufacturing called Electrical Wafer Sorting (EWS) maps, that are generated during the wafer testing phase performed in semiconductor device fabrication. Yield detractors are identified by specific and characteristic anomalies signatures. Unfortunately, new anomalies signatures may appear among the huge amount of EWS maps generated per day. Hence, it’s unfeasible to define just a finite set of possible signatures, as this will not represent a real use-case scenario. Our goal is anomalies signatures classification. For this purpose, we present a semisupervised approach by combining hierarchical clustering to create the starting Knowledge Base, and a supervised classifier trained leveraging clustering phase. Our dataset is daily increased, and the classifier is dynamically updated considering possible new created clusters. Training a Convolutional Neural Network, we reached performance comparable with other state-of-the-a
rt techniques, even if our method does not rely on any labeled dataset and can be daily updated. Our dataset is skewed and the proposed method was proved to be rotation invariant. The proposed method can grant benefits like reduction of wafer test results review time, or improvement of processes, yield, quality, and reliability of production using the information obtained during clustering process.
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