Authors:
Neha Karanjkar
1
and
Madhav Desai
2
Affiliations:
1
Indian Institute of Technology Goa, India
;
2
Indian Institute of Technology Bombay, India
Keyword(s):
Simulation Framework, Discrete-Event, Cycle-based, Open-source, Parallel, C++.
Abstract:
Sitar is an open-source framework for modeling discrete-event, discrete-time systems. It consists of a modeling
language and a lightweight simulation kernel. Sitar is specifically targeted for architecture-level modeling and
fast simulation of computer systems, though it can be used for other kinds of discrete-time systems as-well.
The modeling language allows the description of a system’s structure as an interconnection of hierarchical,
concurrent entities. The behavior of each entity can be described in an imperative manner using constructs such
as time-delays, conditional wait statements, fork-join concurrency and loops. C++ code can be embedded
directly into the description in a well-defined manner, allowing the modeler to use the flexibility and object-oriented features of C++. A model written in this language gets translated to C++ code, which can in-turn be
compiled with the simulation kernel to obtain a single simulation executable, or can be linked with external
libr
aries for co-simulation. The simulation kernel uses a two-phase, cycle-based execution algorithm, and
has been parallelized using OpenMP for fast and scalable simulation on modern multi-core systems. The
framework provides several features to ease the modeling effort, such as in-built logging, syntax highlighting
and systematic error reporting for the Sitar language. In this paper, we describe the design and architecture of
Sitar, and briefly discuss our experience with its use for multi-core design exploration studies.
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