FPGA Implementation of SOBI to Perform BSS in Real Time

Apurva Rathi; Xun Zhang; Francois Vialatte

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Paper

FPGA Implementation of SOBI to Perform BSS in Real Time

In Proceedings of the 4th International Joint Conference on Computational Intelligence - Volume 1: SSCN, 727-731, 2012 , Barcelona, Spain

Authors: Apurva Rathi ¹ ; Xun Zhang ² and Francois Vialatte ³

Affiliations: ¹ VIT University and ISEP, India ; ² ISEP, France ; ³ ESPCI, France

Keyword(s): EEG, BSS, SOBI, FPGA.

Abstract: Blind Source Separation (BSS) is an effective and powerful tool for source separation and artifact removal in EEG signals. For the real time applications such as Brain Computer Interface (BCI) or clinical Neuro-monitoring, it is of prime importance that BSS is effectively performed in real time. The motivation to implement BSS in Field Programmable Gate Array (FPGA) comes from the hypothesis that the performance of the system could be significantly improved in terms of speed considering the optimal parallelism environment that hardware provides. In this paper, FPGA is used to implement the SOBI algorithm of EEG with a fixed-point algorithm. The results obtained show that, FPGA implementation of SOBI reduces the computation time and thus has great potential for real time.

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Paper citation in several formats:

Rathi, A.; Zhang, X. and Vialatte, F. (2012). FPGA Implementation of SOBI to Perform BSS in Real Time. In Proceedings of the 4th International Joint Conference on Computational Intelligence (IJCCI 2012) - SSCN; ISBN 978-989-8565-33-4; ISSN 2184-3236, SciTePress, pages 727-731. DOI: 10.5220/0004182507270731

@conference{sscn12,
author={Apurva Rathi. and Xun Zhang. and Francois Vialatte.},
title={FPGA Implementation of SOBI to Perform BSS in Real Time},
booktitle={Proceedings of the 4th International Joint Conference on Computational Intelligence (IJCCI 2012) - SSCN},
year={2012},
pages={727-731},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0004182507270731},
isbn={978-989-8565-33-4},
issn={2184-3236},
}

TY - CONF

JO - Proceedings of the 4th International Joint Conference on Computational Intelligence (IJCCI 2012) - SSCN
TI - FPGA Implementation of SOBI to Perform BSS in Real Time
SN - 978-989-8565-33-4
IS - 2184-3236
AU - Rathi, A.
AU - Zhang, X.
AU - Vialatte, F.
PY - 2012
SP - 727
EP - 731
DO - 10.5220/0004182507270731
PB - SciTePress