Authors:
Stephan C. Stilkerich
1
;
Christian Siemers
2
and
Christian Ristig
2
Affiliations:
1
EADS Innovation Works, Germany
;
2
University of Technology Clausthal, Germany
Keyword(s):
Safety-critical, Multi-Core, Network on Chip, Beneš-Network, Real-Time Switching, Aerospace, Certifiable.
Related
Ontology
Subjects/Areas/Topics:
Embedded Communications Systems
;
Networking and Connectivity
;
Real-Time Systems
;
Telecommunications
;
VLSI Design and Implementation
Abstract:
The continues improvement of aircraft’s as well as the steady optimization of the overall air traffic during
the last decade increased the demand for processing power in the aircraft and on ground, simultaneously.
Multi-Core platforms could offer the demanded processing power and form factor, but today’s multi-core
components are principally not usable for any safety critical industry and especially not usable for the avionic
domain, because these components are optimized for average case performance and not for full fledged predictability.
This is especially true for the inter-core communicaton network. We argue that a regular and low
overhead Beneš-Network communication structure between the cores and between the cores and the shared
resources, can smoothly pave the way for certification of multi-core architectures in the avionic domain. The
presented details on the regular structure of the network, the scheduling variants discussed in the paper and
the currently on-going research
work to proof profound theoretical limits, bounds etc. substantiate our claim
for an utilization of multi-cores in the avionic domain and with respect to the valid regulations for airborne
equipment.
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