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Authors: Hamza Gharsellaoui 1 ; Jihen Maazoun 2 ; Nadia Bouassida 2 ; Samir Ben Ahmed 3 and Hanene Ben-Abdallah 4

Affiliations: 1 Carthage University and Al-Jouf College of Technology, Tunisia ; 2 Sfax University, Tunisia ; 3 Carthage University and Tunis El Manar University, Tunisia ; 4 King Abdulaziz University, Saudi Arabia

Keyword(s): Real-time Scheduling, Reconfigurable Embedded Systems, SPL Design, UML Marte.

Related Ontology Subjects/Areas/Topics: Service-Oriented Software Engineering and Management ; Software and Systems Development Methodologies ; Software Engineering

Abstract: Several real-time embedded system must be dynamically reconfigured to account for hardware/software faults and/or maintain acceptable performances. Depending on the run-time environment, some reconfigurations might be unfeasible,i.e., they violate some real-time constraints of the system. In this paper, we deal with the development of dynamically reconfigurable embedded systems in terms of the production of execution schedules of system tasks (feasible configuration) under hard real-time constraints. More specifically, we propose an approach that starts from a set of reconfigurations to construct a Software Product Line that can be reused in a predictive and organized way to derive real-time embedded systems. To make sure that the SPL offers various feasible reconfigurations, we define an intelligent agent that automatically checks the system’s feasibility after a reconfiguration scenario is applied on a multiprocessor embedded system. This agent dynamically determines precious techn ical solutions to define a new product whenever a reconfiguration is unfeasible. The set of products thus defined by the agent can then be unified into an SPL. The originality of our approach is its capacity to extract, from the unfeasible configurations of an embedded system, an SPL design enriched with real-time constraints and modeled with a UML Marte profile. The SPL design can assist in the comprehension, reconfiguration as well as evolution of the SPL in order to satisfy real-time requirements and to obtain a feasible system under normal and overload conditions. (More)

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Paper citation in several formats:
Gharsellaoui, H.; Maazoun, J.; Bouassida, N.; Ben Ahmed, S. and Ben-Abdallah, H. (2015). A Real-time Scheduling of Reconfigurable OS Tasks with a Bottom-up SPL Design Approach. In Proceedings of the 10th International Conference on Evaluation of Novel Approaches to Software Engineering - ENASE; ISBN 978-989-758-100-7; ISSN 2184-4895, SciTePress, pages 169-176. DOI: 10.5220/0005342501690176

@conference{enase15,
author={Hamza Gharsellaoui. and Jihen Maazoun. and Nadia Bouassida. and Samir {Ben Ahmed}. and Hanene Ben{-}Abdallah.},
title={A Real-time Scheduling of Reconfigurable OS Tasks with a Bottom-up SPL Design Approach},
booktitle={Proceedings of the 10th International Conference on Evaluation of Novel Approaches to Software Engineering - ENASE},
year={2015},
pages={169-176},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0005342501690176},
isbn={978-989-758-100-7},
issn={2184-4895},
}

TY - CONF

JO - Proceedings of the 10th International Conference on Evaluation of Novel Approaches to Software Engineering - ENASE
TI - A Real-time Scheduling of Reconfigurable OS Tasks with a Bottom-up SPL Design Approach
SN - 978-989-758-100-7
IS - 2184-4895
AU - Gharsellaoui, H.
AU - Maazoun, J.
AU - Bouassida, N.
AU - Ben Ahmed, S.
AU - Ben-Abdallah, H.
PY - 2015
SP - 169
EP - 176
DO - 10.5220/0005342501690176
PB - SciTePress