Authors:
Masahiro Fujita
;
Takeshi Matsumoto
and
Hiroaki Yoshida
Affiliation:
VLSI Design and Education Center, University of Tokyo, Japan
Keyword(s):
HW/SW reuse, System-on-a-Chip, HW/SW co-design, UML, architecture template, design template.
Related
Ontology
Subjects/Areas/Topics:
Applications and Software Development
;
Artificial Intelligence
;
Artificial Intelligence and Decision Support Systems
;
Case-Based Reasoning
;
Component-Based Software Engineering
;
Embedded Communications Systems
;
Enterprise Information Systems
;
Information Systems Analysis and Specification
;
Model-Driven Software Development
;
Pattern Recognition
;
Requirements Analysis And Management
;
Software Architectures
;
Software Engineering
;
Symbolic Systems
;
Telecommunications
;
Theory and Methods
Abstract:
In general, a design refinement process of an electronic system including both hardware and software traces a similar process of other systems in requirements analysis and system-level design. It is more true especially when they belong to the same product domains. Therefore, we can reuse various documents easily by making templates of the design refinement. In this paper, we propose a methodology that generates those templates and illustrate that the template made from the design refinement process of Compact-Flash (CF) memory interface controller can actually be used in that of ATM switch. Both of them are typical HW/SW co-designs where most of the control is performed by software. The generated templates can be applied to various designs which have the structure of “IO + intelligent buffers”. We use UML to describe the design templates and prove the efficiency of the use of the templates by showing the similarity of UML diagrams.