Authors:
Syed M. A. H. Jafri
1
;
Liang Guang
2
;
Axel Jantsch
3
;
Kolin Paul
4
;
Ahmed Hemani
3
and
Hannu Tenhunen
1
Affiliations:
1
Royal Institute of Technology, University of Turku and Turku Centre for Computer Science, Sweden
;
2
University of Turku and Turku Centre for Computer Science, Finland
;
3
Royal Institute of Technology, Sweden
;
4
Indian Institute of Technology Delhi, Sweden
Keyword(s):
DVFS, Agent based Design, Hardware/Software Co-design, Multiprocessor Architectures, Low-power Design.
Abstract:
Architecture and Implementation of adaptive NoC to improve performance and power consumption is presented. On platforms hosting multiple applications, hardware variations and unpredictable workloads make static design-time assignments highly sub-optimal e.g. in terms of power and performance. As a solution to this problem, adaptive NoCs are designed, which dynamically adapt towards optimal implementation. This paper addresses the architectural design of adaptive NoC, which is an essential step towards design automation. The architecture involves two levels of agents: a system level agent implemented in software on a dedicated general purpose processor and the local agents implemented as microcontrollers of each network node. The system agent issues specific instructions to perform monitoring and reconfiguration operations, while the local agents operate according to the commands from the system agent. To demonstrate the system architecture, best-effort power management with distribut
ed voltage and frequency scaling is implemented, while meeting run-time execution requirements. Four benchmarks (matrix multiplication, FFT, wavefront, and hiperLAN transmitter) are experimented on a cycle-accurate RTL-level shared-memory NoC simulator. Power analysis with 65nm multi-Vdd library shows a significant reduction in energy consumption (from 21 % to 36 %). The synthesis also shows minimal area overhead (4 %) of the local agent compared to the original NoC switch.
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