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Authors: Irfan Uddin ; Raphael Poss and Chris Jesshope

Affiliation: University of Amsterdam, Netherlands

Keyword(s): Performance estimation, many-core systems, high-level simulations.

Related Ontology Subjects/Areas/Topics: Complex Systems Modeling and Simulation ; Computer Simulation Techniques ; Discrete-Event Simulation ; Domain-Specific Tools ; Formal Methods ; Multiscale Simulation ; Performance Analysis ; Simulation and Modeling ; Simulation Tools and Platforms

Abstract: The simulation of fine-grained latency tolerance based on the dynamic state of the system in high-level simulation of many-core systems is a challenging simulation problem. We have introduced a high-level simulation technique for microthreaded many-core systems based on the assumption that the throughput of the program can always be one cycle per instruction as these systems have fine-grained latency tolerance. However, this assumption is not always true if there are insufficient threads in the pipeline and hence long latency operations are not tolerated. In this paper we introduce Signatures to classify low-level instructions in high-level categories and estimate the performance of basic blocks during the simulation based on the concurrent threads in the pipeline. The simulation of fine-grained latency tolerance improves accuracy in the high-level simulation of many-core systems.

CC BY-NC-ND 4.0

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Paper citation in several formats:
Uddin, I.; Poss, R. and Jesshope, C. (2014). Signature-based High-level Simulation of Microthreaded Many-core Architectures. In Proceedings of the 4th International Conference on Simulation and Modeling Methodologies, Technologies and Applications - SIMULTECH; ISBN 978-989-758-038-3; ISSN 2184-2841, SciTePress, pages 509-516. DOI: 10.5220/0004982405090516

@conference{simultech14,
author={Irfan Uddin. and Raphael Poss. and Chris Jesshope.},
title={Signature-based High-level Simulation of Microthreaded Many-core Architectures},
booktitle={Proceedings of the 4th International Conference on Simulation and Modeling Methodologies, Technologies and Applications - SIMULTECH},
year={2014},
pages={509-516},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0004982405090516},
isbn={978-989-758-038-3},
issn={2184-2841},
}

TY - CONF

JO - Proceedings of the 4th International Conference on Simulation and Modeling Methodologies, Technologies and Applications - SIMULTECH
TI - Signature-based High-level Simulation of Microthreaded Many-core Architectures
SN - 978-989-758-038-3
IS - 2184-2841
AU - Uddin, I.
AU - Poss, R.
AU - Jesshope, C.
PY - 2014
SP - 509
EP - 516
DO - 10.5220/0004982405090516
PB - SciTePress