![](bg3.png)
CSP+T process is defined to model the complete scheme. If this scheme is already
included in a CTP or DTP of a higher level, repeat step (3), thus progressively inte-
grating the CSP+T model of the system in an ascending way. The process finishes
when the model of the System Context Diagram is obtained.
3 Specification example: The Production Cell
As an application result of our method, a complete CSP+T model for the production
cell problem can be found at http://lsi.ugr.es/~sc/vveis04.pdf. We now present part of
the design of the Robot Control Process (RCP).
RCT= start→actions(start)→RTurnCW
RTurnCW= (robot_pos_1
t→action(RTurnCW)→POS_1
| robot_pos’ ? robot_pos→RTurnCW)
POS_1= (I
1
(a
1
_finish)→actions(POS_1_CCW)→RturnCCW→POS_1
| I
2
(a
1
_finish)→disable_a
1
→action(blank_timeout)→RTurnCCW)
Its associated enabling intervals are defined as follows: I
1
(a
1
_finish)= [t, t+T],
which indicates that the robot arm1 (
a
1
) picked up a blank from the rotary table;
I
2
(a
1
_finish)=(t+T, ∞), in this case there is no blank to pick up within time T.
We have two possible cases to model: the first one represents the presence of a blank
on the rotary table that the arm1 gripper will be able to pick up, the action
a
1
_finish is therefore executed, then arm1 is positioned and is prepared to ex-
tend to pick up the blank; the second one occurs when no new blank prompts on time
(i.e., within the deadline T) causing an exception to be raised to inform the system of
a blank_timeout event. When it reaches the position
POS_1, the control of the
robot starts turning arm1 counterclockwise (CCW) until arm2 picks a forged plate
from the press, or arm 2 (
a
2
) points to the deposit belt to place a plate on it, or arm1
goes to the position in which it deposits a blank on the press.
Conclusions
Our methodological scheme uses CSP+T process algebra to provide the user with a
set of patterns into which they can translate from RT/SA entities into CSP+T proc-
esses with different semantics.
We are currently working on the development of a formal software tool based on
CTJ and Java, capable of automated specification, verification and code generation of
real-time and embedded system software for several platforms.
References
1. Baresi, L., Pezze, M.:Towards Formalising Structural Analisis. ACM Transactions on Soft-
ware Engineering and Methodology, 7, 1998, 1, pp.80-107.
2. Capel, M.I.: Mathematical Modeling of Technical Processes, Informatech, Košice, 2000,
pp.59-81. ISBN: 80-88941-12-1.
3. Fencott, P.C., Galloway, A.J., Lockyer, M.A., O’Brien, S.J., Pearson, S.: Formalising the
Semantics of Ward-Mellor SA/RT Essential Models Using Process Algebra. In FME’94:
Industrial Benefit of Formal Methods. LNCS 873, Springer-Verlag, 1994, pp.681-702.
4. ŽIC, J.J.: Time-Constrained Buffer Specifications in CSP+T and Timed CSP. ACM Trans-
actions on Programming Languages and Systems, 16, 1994, 6, pp.1661-1674.
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