![](bg2.png)
Figure 2: An equivalent circuit of a DeFET and schematic
of the DeFET used in SPECTRE simulation.
From Fig. 2, the two gates of P eFET and N eFET
are connected with each other, and there is a cross
coupling between the two drains of the P eFET and
the N eFET. The output current I
Out
is equal to the
difference between the two drain currents Ip-In (i.e.
I
Out
= Ip-In, see Fig.2). On the other hand, Ip and In
are functions of the two applied gate voltages V
in1
and V
in2
, respectively. The DeFET is designed to
achieve an output voltage V
Out
, directly related to the
difference between the two applied gate voltages
(V
in1
-V
in2
), and as V
in1
-V
in2
is equal to the applied
electric field above the two gates (E) multiplied by
the distance between them (V
in1
-V
in2
/Y = E), where
Y is the distance between the two split gates, which
is constant. So, V
Out
is related directly to the intensity
of the applied electric field. Thus by measuring V
Out
we can detect the intensity of the electric field to be
as follows (Ghallab et al., 2006):
Ou t m L Un i
VgYREV=+
(1)
Eq. 1 shows a liner relationship between the
DeFET’s output voltage and the intensity of the
applied electric field.
Also, from Eq. 1, we can observe that there is two
cases, they are:
1) Null electric-field case (Uniform case): This
special case will be obtained when the intensity of
the electric filed is zero, and consequently getting
the same potential on the two gates (i.e., V
in1 = Vin2),
and from Eq.1V
out
=V
uni
2) Nonzero electric-field case (Nonuniform case):
This implies any electric-field condition that leads to
a potential difference between the two gates (i.e.,
V
in1 ≠Vin2). So, we can rewrite Eq. 1 as:
out Non Uni
V=V +V
(2)
where: V
non
= SE=
mL
YR E
is the output voltage
when we have a nonuniform electric field case, and
V
uni
is the output voltage when we have a uniform
electric field case and S (sensitivity) =
mL
YR
.
3 MODELING THE DeFET
As a new device, the DeFET is not a standard device
in the simulator libraries, so a macro model to
evaluate the performance of circuits composed of
DeFET and MOSFET devices is needed. A Dc
model has been proposed and tested using
SPECTRE version 5. Also, an equivalent dc circuit
of the DeFET using PSPICE version 9.1 have
proposed. So, it can be used in the SPICE
environment.
3.1 A Simple DC Model
Fig. 2 shows the proposed DeFET circuit used for
SPECTRE simulation. The channel length and the
width of the Pmos and Nmos used are 0.4μm / 10μm
and 0.4μm / 1μm, respectively. Fig. 3 shows the
simulation results of the output voltage V
Out
against
the input voltage difference V
in1
- V
in2
(∆V), where
V
in1
varies from –2.5V to 2.5V and V
in2
is 0V.
Figure 3: DC response of the DeFET.
From Fig. 3, a linear relationship between V
Out
and
∆V can be observed. As the external electric field
E= -∆V/Y, and Y=0.5μm, Fig.4 shows the output
voltage V
Out
against the intensity of the applied
electric field. We can observe that V
Out
is linearly
related to E, as we expected from the theory of the
DeFET (see Eq. 1). The sensitivity can be
determined from this figure as S= ∆V
out
/∆E =
51.7(mV/V/μm). If we vary V
in1
from –2.5 to 2.5
Volt
and V
in2
from –3 to 3Volt, we can get the same
DIFFERENTIAL ELECTRIC FIELD SENSITIVE FIELD EFFECT TRANSISTOR - Characteristics, Modeling and
Applications
251