small. And the L1 to
∑
C ratio should be large
enough.
Finally, up limit does exist for the value of L1.
Increase L1 too much will decrease its self-resonant
frequency and force the corresponding
∑
C decrease
to the BJT’s parasitic capacitance region, which may
cause unstable oscillation (Razavi, 1998).
The selection of L1 value is a compromise
between these issues discussed above.
2.2.2 Selection of C1 and C2
According to the analysis in section 2.2.2, to achieve
a higher quality factor, C1 and C2 should be as small
as possible. On the other hand, however, C1 and C2
can not be too small. Because C1 is in parallel with
the junction capacitance C
CE
and C2 is in parallel
with the junction capacitance C
BE
, Rp is the
equivalent resistance. Its relation to the loop is
shown in equation (4). The equivalent oscillation
loop is shown in Figure 3.
Figure 3: Equivalent Oscillation Loop.
Figure 3 tells us if C1 and C2 are too small, Cce
and Cbe will dominate the oscillation frequency.
Typically, C1 and C2 should be greater than Cce and
Cbe. Therefore,
∑
C should lies inn the range of 1 pf
to 4 pf.
Also, known
∑
C , the value of C1 to C2 directly
depends on their ratio, C1/C2. Again, compromise
exists when selecting this ratio. Smaller C1/C2 ratio
means larger loop quality factor but smaller positive
feedback gain, while larger C1/C2 ratio gives greater
feedback gain but lower quality factor (Razavi,
1998). In practice, experiment shows that 3.3pf and
18pf capacitor pair gives stable oscillation and
makes it easy to start the oscillation. Now, we can
modify equation (1) to obtain practical equation for
oscillation frequency f
0
.
m
P
g
CC
R
2
21
)/1( +
=
(4)
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
⋅
⋅
=
21
21
1
0
''
''
2
1
CC
CC
L
f
π
(5)
Where
CE
CE
CC
CC
C
+
=
1
1
1
'
(6)
And
BE
BE
CC
CC
C
+
=
2
2
2
'
(7)
2.2.3 Selection of Rf and R1
R
F
is a DC negative feedback resistor, which helps
stabilize the transistor current gain. R1 is used to set
up the collector I
C
. However, R
F
and R1 are also the
main power consumption components in this circuit.
The power they consume can be estimated by
equation (7) and (8).
fCRf
RIP ∗=
2
(7)
1
2
1
RIP
BR
∗= (8)
Since I
C
is usually large, R
F
should be as small as
possible. And because I
B
is typical in uA range, thus
P
R1
is usual less than 50 uW. In practical design, for
the purpose of low power consumption, we
simultaneously decrease R
F
and increase R1, the
final power consumption of the oscillation is only
750 uW, compared to the typical 10 mW power
consumption for a commercial transmitter, this is a
great advantage.
2.3 Amplifier Stage
Figure 6 is the structure for amplifier stage. It
consists of two JFET operational amplifiers. Each
stage runs on a single power supply and has a gain
of 100. To save power, an OPA with only 40 uA
current consumption at 2V is used. Important design
rules about amplifier stage are exploded below.
2.3.1 Power Line Decoupling
In practical application, the battery has non-zero
internal impedance, which induces AC voltage on
the power line.
If not carefully decoupled, the AC voltage on the
power becomes an input to amplifier stage. This will
cause the amplifier stage self-oscillate. Also, smaller
R20 and R19 (as shown in Fig 4) value may be
necessary to further ensure no self-oscillation will
occur.
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