ure 3). It provides remote access and makes them in-
dependent with respect to the other layers. This layer
consists of two different processes that carry out the
signal processing operations needed to link the user
and middleware layers. The first process (TXPROC)
receives the symbol vectors from the user layer and
performs the up sampling, pulse-shape filtering, I/Q
modulation and frame assembling operations in or-
der to generate the IF signals that will be sent to the
middleware. Similarly, the second process (RXPROC)
waits for the acquired signals from the middleware
and performs the time and frequency synchronization
operations followed by the I/Q demodulation, filtering
and down sampling. The resulting vectors are sent to
the user layer.
5.3 MIDDLEWARE LAYER
The middleware concept constitutes a great leap for-
ward in multiple-antenna testbed technology, making
the testbed hardware accessible through ordinary net-
work connections. This layer fills the gap between the
testbed hardware and the signal processing layer, al-
lowing discrete-time signals to be transferred through
the PCI bus and making possible the synchronization
between the Tx PC and the Rx PC using a network
connection.
The middleware architecture is split into two dif-
ferent sub-layers (see Figure 3). The top sub-layer is
responsible of establishing the network connections
between the transmitter and the receiver, and with the
higher layer (the signal processing layer). The bottom
sub-layer corresponds to the testbed hardware config-
uration and control software.
The middleware is constituted by four different
processes. The first two (TxHost and RxHost) im-
plement the so-called top sub-layer and run, respec-
tively, on the Tx PC and the Rx PC. They are im-
plemented in standard C++ language and use sockets
to establish the necessary network connections: one
between TxHost and RxHost processes (used to syn-
chronize the transmitter and the receiver, thus the re-
ceiver knows when the signal acquisition process has
to start); another one, established between the TX-
HOST process and the Tx signal processing layer;
and, finally, another one between the RXHOST pro-
cess and the Rx signal processing layer. The re-
maining two processes are the transmitter and the
receiver processes that run on their respective Digi-
tal Signal Processors (DSPs) available in the testbed
hardware. They implement the so-called bottom sub-
layer. The transmitter DSP process (TXDSP) per-
forms data transfers through the PCI bus jointly with
the TXHOST process and configures and controls
the hardware components at the Tx PC. In the same
way, the RXHOST process and the DSP receiver pro-
cess (RxDSP) are responsible of transferring the data
through the PCI bus and, from the DSP side, con-
trolling and configuring the testbed hardware compo-
nents at the Rx PC.
6 A LESSON IN DIGITAL
COMMUNICATIONS
Thanks to the abstraction level of our distributed ar-
chitecture, it is very easy to devise a graphical tool for
testbed-assisted learning (gtTAL). This tool helps in
explaining basic concepts about wireless digital com-
munication transceivers, including multiple-antenna
systems. For instance, we have developed a first re-
lease of gtTAL oriented to explain Orthogonal Space-
Time Codes (OSTBC), including the popular 2×1
Alamouti OSTBC (Alamouti, 1998).
The students should be familiar with some ba-
sic concepts in the field of wireless digital commu-
nications, such as modulation types (e.g. PAM, PSK,
QAM), symbol rate and bandwidth, the concept of
SNR (Signal-to-Noise Ratio), matched filtering, etc.
6.1 The 2×1 Alamouti OSTBC
Signal Model
Let us start with the explanation describing the base
band model of the 2×1 Alamouti OSTBC. Two anten-
nas are used at the transmitter side and only one an-
tenna is employed at the receiver side (see Figure 5).
As shown in Figure 5, the input binary data stream b
i
is first mapped to the corresponding symbols, which
are then split into two sub-streams s
1
and s
2
. Each
pair of modulated symbols {s
1
, s
2
} is then transmit-
ted during two consecutive time slots using the fol-
lowing strategy: during the first time slot, s
1
and s
2
are respectively transmitted through the first and the
second antenna. During the second time slot, −s
∗
2
is
transmitted through the first antenna while s
∗
1
is trans-
mitted through the second one
1
.
Since the source symbols are sent through the an-
tennas during two consecutive time slots, they experi-
ence different fading realizations h
1
and h
2
(see Fig-
ure 5), but the fading value is assumed to be the same
during two time slots (i.e. a block fading channel with
a duration of at least two channel uses). Hence, the
1
The operator (·)
∗
denotes complex conjugation.
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