dramatically. The MLMINs were developed mainly
to meet the need for efficient handling of multicast
traffic (Tutsch, 2006). MLMINs are more suitable
fabrics for modern traffic as well as on-line
multimedia applications, which are increasing in
importance.
The main weakness of the MLMIN architecture
is attributed to the exponentially growing number of
layers as the stages increase, which leads to higher
costs. If we try to reduce the number of layers then
hardware complexity is reduced and, therefore, so is
the overall cost of the fabric.
Semi-Layer MINs (SeLMINs) are special cases
of the multi-layer MIN. SeLMINs are defined
(Garofalakis and Stergiou, 2009), (Garofalakis and
Stergiou, Oct 2010) as a multilayer MIN which
consists of two segments. The second segment must
keep the levels growth fixed and equal to the Switch
Element (SE) size. The second segment of the MIN
is an unblocked segment. Figure 2 illustrates
examples of two SeLMIN cases in 2D view, which
have two and four layers, respectively.
When the layers of a SeLMIN are Delta type
multistage networks, we have semi-layer multistage
Delta type networks, which are the kind of networks
being studied here.
These multistage fabrics are devices which can
be constructed using a finite buffer size. However,
the main question which arises is: what is the
suitable buffer size in each case of traffic? This work
tries to provide an answer to this question.
Hence, the main goal of this paper is to evaluate
the performance of semi-layer delta type networks
assuming the offered load is of unicast type, for
different buffer size constructions. Ultimately, the
objective is to determine the buffer size which
optimizes throughput and packet latency.
Performance evaluation was conducted through
simulation, considering uniform traffic conditions.
Metrics were collected for the two major important
network performance factors, which is throughput
and packet latency.
The remainder of this paper is organized as
follows: in section II, a brief analysis of a semi-layer
delta network, which is the main research subject, is
presented. Subsequently, in section III, the
performance criteria and parameters that are related
to the above network schemes, are presented.
Section IV reveals the results of our simulation-
based performance analysis, examining the effect
that the buffer size has on overall network
performance. Finally, section V provides concluding
remarks.
2 DEFINITION OF MULTILAYER
DELTA NETWORKS
A typical multistage (
NxN
) MIN is constructed by
NL
c
log
parallel stages of (
cxc
) Switch
Elements (SEs), where c is the degree of the SEs.
Each stage contains
)/( cN SEs. Hence, the total
number of SEs of a MIN is equal to
NcN
c
log)/(
. Thus, there are
)log( NNO
interconnections between all the
stages, in contrast to the crossbar network that has
)(
2
NO links. Also, a MIN is distinguishable from
the others if we know, except of its topology, the
switching techniques and the routing algorithm used.
The fabrics examined here use the store and forward
switching technique and shuffle perfectly as a
routing algorithm. The routing is performed in a
pipeline manner, which means the routing process
occurs in every stage, in parallel.
The whole network operates “synchronously”,
which means that the time cycles refer to global
clock ticks. The network clock consists of two
phases. In the first phase, the queues are serviced
and then any new packets are received.
Moreover, each MIN operates under the following
assumptions:
The service time of the output queues at each
switch is assumed to be fixed and equal to the
network cycle time.
The traffic feeding the first stage of the MIN
switch follows a Bernoulli type distribution, so
the arrivals are considered independent from
each other. If (
k ) is the random variable
denoting the count of arrivals of packets at the
end of a network cycle on a queue of a
cc
SE at the first stage of the MIN, the formula is
(Garofalakis, 2008):
⎪
⎩
⎪
⎨
⎧
≤≤
⎟
⎠
⎞
⎜
⎝
⎛
−
⎟
⎠
⎞
⎜
⎝
⎛
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
=
−
otherwise
kcfor
k
p
k
p
c
k
x
ckc
ck
,,0
0,1
)1(
,
(1)
Where
)1(
,ck
x : depicts the probability of ( c ) packets
accepted in an arbitrary first stage queue with in
general (
k ) inputs at an arbitrary time cycle.
However, usually the under study systems have
2
k inputs, hence the c can be 0, 1 or 2 at the
most.
Also
depicts the probability of packets arrivals in
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