![](bg6.png)
Figure 4: Energy consumption normalized to the baseline design.
ence, and hence reducing energy and delay of lower-
level memory access. Experiments on a case study of
multitasking application reports an energy reduction
of 36.5% with the PLIC design. The reduction on I-
cache misses ranges from 6.0% to 18.3%, depending
on the frequency of context switch in the multitasking
system.
ACKNOWLEDGEMENTS
This work is supported by JSPS NEXT program un-
der grant number GR076.
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