![](bg2.png)
2 RELATED WORKS AND PAPER
CONTRIBUTION
FTA is a deductive top-down method to analyse
system design and safety. Typical FT consists of the
top event and a set of basic and house events
organized with logic gates. The FT qualitative
analysis aims to find all the minimal combinations
of basic events (called minimal cut sets) resulting in
the top event. The quantitative analysis of FTs is
also often used in probabilistic computation
performed by such tools as XFTA (XFTA, 2011).
The FT generation approaches fall into several
categories. Structured approaches (NASA, 2002)
use manually created models of failure behaviour.
Such approaches rely upon the ability of the SA
engineer to predict the system behaviour and,
consequently, may lead to higher probablity of
errors. Another group of FT generation approaches
(for example, HiP-HOPS (Walker et al., 2007) is
based on the use of analytical expressions associated
with the system components to model the possible
propagation of failures. Approaches based on failure
modes injection extend each component of the
nominal system model with a set of possible failure
modes and then model the system failure behaviour
using such an extended model. The tools based on
these approaches (for example, FSAP/NuSMV
(Bozzano and Villafiorita, 2007)) translate an
extended model into a state machine and then use
formal verification algorithms to generate FTs. We
list here only academic approaches, since industrial
solutions generally rely on part of them. Although
tools mentioned above (Walker et al., 2007),
(Bozzano Villafiorita, 2007) perform automatic FT
generation, they lack convenient representation of
the input system models and final results of SA. For
example, FSAP/NuSMV or ARC (ARC, 2012) tools
use formal languages such as SMV or AltaRica to
describe a system which might require certain time
efforts from the SA engineer. In HiP-HOPS, safety
annotations can be entered through a profile of the
EAST-ADL implementation in Papyrus, but there
are no elaborated mechanisms to show the results of
SA in the system models.
In this work we analyze the possibilities of using
different methods and tools for automatic FT
generation, analysis and visualization across the
MBSE process. We propose to combine the
analytical approach with formal verification methods
to automatically generate FTs derived from the
SysML models. We represent a safety modelling
framework for FT generation and analysis, called
SMF-FTA. SMF-FTA enables the use of formal
verification and FTA algorithms during the MBSE
process supported by the Papyrus (Papyrus, 2012)
editing tool for SysML. Furthermore, it implements
an ability to visualize FTA results in the SysML
modelling environment. SMF-FTA contains model
transformation tools, the ARC tool for formal
verification and the XFTA tool for FTA, as well as
the AltaRica (Arnold et al., 2000) and Open-PSA
(Open-PSA, 2008) metamodels and the profile for
FT visualization. In the next sections, we shall
describe the SMF-FTA architecture and show how
the tool can be used for the FT generation and
analysis.
3 SAFETY MODELLING
FRAMEWORK
The architecture of SMF-FTA is represented in
Figure 1. It has been implemented using java under
Eclipse Modelling Framework (EMF) and includes a
set of tools for FT generation and analysis. The FT
generation method and tool flow associated with
SMF-FTA include several steps. First, a system
under analysis is designed with Papyrus platform
using SysML block and internal block diagrams.
Then a SysML model of a system is annotated with
the possible failure behaviour. Once the annotation
has been done, the failure modes of every block are
automatically extracted from the output deviation
expressions, and the SysML model is converted into
the AltaRica language. The checking of the AltaRica
model is performed by the ARC tool using an
automatically generated script. This script allows
ARC to generate minimal cut sets for the considered
model. Based on this information we automatically
create FTs and represent them in the Open-PSA
format. Finally, with the XFTA tool we can perform
FT quantitative analysis. In order to make SA results
more representative, we visualize FTs in SysML
modelling environment using dedicated FT profile.
Figure 1: The SMF-FTA architecture.
Model-basedSystemEngineeringforFaultTreeGenerationandAnalysis
211