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tional performancewith dramatically better character-
istic of the former in terms of hardware implementa-
tion, regardless the
MAD is implemented as a combi-
natorial trellis as suggested by some authors or in a
more efficient folded version. The paper also stresses
the benefit of using hardware-software co-simulations
tools such as Xilinx System Generator for rapid proto-
typing and verification on FPGA, which represents a
value added for the research in rapidly evolving fields
such as neural engineering, overcoming the limits of
the traditional HDL coding.
ACKNOWLEDGEMENTS
The research leading to these results has received
funding by the Region of Sardinia in the ELoRA
project (Fundamental Research Programme, L.R.
7/2007, grant agreement CRP-60544), by the Euro-
pean Commission in the NEBIAS project (FP7, FET
Proactive, grant agreement 611687), by Italian Gov-
ernment in the HANDBOT project (PRIN 2010/11,
prot. 2010YF2RY
003) and by the Italian Ministry of
Health in the NEMESIS project (Young Researchers,
grant agreement 064/GR-2009-1591615).
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