to my formalisation of the EMFTVM bytecode in the
VeriMTLr framework.
6 STAGE OF THE RESEARCH
I have spent three years developing the VeriMTLr
framework. The goal is to provide rapid verifier con-
struction for MTr languages. In particular, the Ver-
iMTLr framework assists in designing verifiers that
allow automatic theorem proving of partial and total
correctness of MTr. It encapsulates four core com-
ponents to reduce coding costs, time and errors of
verifier construction, i.e. the Boogie IVL, the mem-
ory model (for formalizing metamodels), the con-
tract libraries (which formalises OCL, SET theory
and FOL), and the EMFTVM bytecode formalisation.
Next, I illustrate three identified limitations of the
VeriMTLr framework. First, my framework relies on
Boogie, which sits on top of the Z3 SMT solver. Z3
is based on first order predicate logic with equality,
which restricts the expressiveness of my framework.
For example, it is not possible to express transitive
closure properties.
Second, the soundness of the VeriMTLr frame-
work depends on the correctness of my formalisations
for metamodels, contract libraries and EMF bytecode.
The correctness of these formalisations are challeng-
ing theoretical problems that require well-defined and
commonly accepted formal semantics of each. How-
ever, to my knowledge, none of them are currently
available. However, my formalisations are encoded
in Boogie, which yields intuitive formalisations for
inspection.
Third, the completeness of the VeriMTLr frame-
work remains one of my major concerns. The veri-
fier constructed by the VeriMTLr might not be able
to verify a model transformation specification against
its contracts, even if the two are verifiable. The in-
completeness of the VeriMTLr framework might be
due to the underlying SMT solver (i.e. the undecid-
ability of first-order-logic). It might also be due to
my formalisations. For example, the formalisation
of the sequence data type in my OCL library only
contains the essential definition for append opera-
tion. The auxiliary axioms such as “any sequence
appended with an empty sequence is the original se-
quence” are not in my formalisation. The decision is
made deliberately. Essentially, I reduce each MTr ver-
ification problem into a SMT formula solving prob-
lem. Extra axioms will generate longer SMT formu-
lae, and might be more difficult to solve. Therefore,
I think it is better to present the missing auxiliary ax-
ioms as lemmas, which will be introduced on demand.
Moreover, presenting only the essential axioms is a
strategy that helps manual inspection and reduces the
possibility of inconsistent axioms.
In the last year of my research, I plan to work with
more MTr scenarios (preferably with transformation
contracts) to ensure first order predicate logic with
equality is expressive enough for MTr verification in
practice.
I have not shown the reusability of the VeriMTLr
framework. Therefore, it would be interesting to work
with the VeriMTLr to design a verifier for another tar-
get MTr language. I expect the core components in
my framework can be reused to systematically design
a modular and sound verifier for this target MTr lan-
guage.
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