A Mathematical Model for Signal’s Energy at the Output of an Ideal
DAC
Paola Loreti and Pierluigi Vellucci
Sapienza University of Rome, Department of Basic and Applied Sciences for Engineering,
Via Antonio Scarpa n. 16, 00161, Roma, Italy
Keywords:
Timing Jitter, Digital-to-analog Converters, Bandlimited Interpolation, Energy Estimate.
Abstract:
The presented research work considers a mathematical model for energy of the signal at the output of an ideal
DAC, in presence of sampling clock jitter. When sampling clock jitter occurs, the energy of the signal at the
output of ideal DAC does not satisfies a Parseval identity. Nevertheless, an estimation of the signal energy is
here shown by a direct method involving sinc functions.
1 INTRODUCTION
Interpolation based on
f (t) =
∑
n∈Z
a
n
sinc(t − n) (1)
is usually called ideal bandlimited interpolation, be-
cause it provides a perfect reconstruction for all t,
if f (t) is bandlimited in f
m
and if the sampling fre-
quency f
s
is such that f
s
> 2 f
m
. The sinc function in
(1) is defined as
sinc(α) =
(
sin(πα)
πα
α 6= 0,
1 α = 0.
(2)
The system used to implement (1), which is known
as an ideal DAC (i.e. digital-to-analog converter, see
(Manolakis and Ingle, 2011)), is depicted in block di-
agram form in figure 1.
DACs are essential components for measur-
ing instruments (such as arbitrary waveform sig-
nal generators) and communication systems (such as
transceivers). Since higher sampling speed is being
demanded for them, their sampling clock jitter effects
may be crucial. Jitter is the deviation of a signal’s tim-
ing event from its intended (ideal) occurrence in time,
often in relation to a reference clock source. There-
fore, time jitter is an important parameter for deter-
mining the performance of digital systems. For a re-
view how time jitter impacts the performance of dig-
ital systems, see (Reinhardt, 2005). For digital sam-
pling in analog-to-digital and digital-to-analog con-
verters, it is shown that noise power or multiplicative
decorrelation noise generated by sampling clock jitter
Ideal DAC
CLOCK
a
k
f (t)
Figure 1: Representation of the ideal digital-to-analog con-
verter (DAC) or ideal bandlimited interpolator. According
to 1.
is a major limitation on the bit resolution (effective
number of bits) of these devices, (Reinhardt, 2005).
In (Kurosawa, 2002) authors analyze the clock jit-
ter effects on DACs, (Fig. 1 therein), considering
a DAC where a digital input is applied with a sam-
pling clock CLK. Ideally the sampling clock CLK
operates with a sampling period of T
s
for every cy-
cle, however in reality its timing can fluctuate (see
Fig. 2 in (Kurosawa, 2002)). Phase and frequency
fluctuations have therefore been the subject of numer-
ous studies; well-known references include: (Abidi,
2006), (Demir et al., 2000), (Hajimiri and Lee, 1998),
(Razavi, 1996).
As it has been well argued in previous works ((An-
grisani et al., 2009), (Kurosawa, 2002)), theory deal-
ing with major aspects concerning DAC time base jit-
ter, quantization noise, and nonlinearity is still incom-
plete; unexpected changes and distortions of wave-
forms generated via DAC are occasionally supported
by simulations and barely investigated by means of
experimental activities, (Angrisani et al., 2009) and
references therein. See also: (Corradini et al., 2011),
Loreti, P. and Vellucci, P.
A Mathematical Model for Signal’s Energy at the Output of an Ideal DAC.
DOI: 10.5220/0005979303470352
In Proceedings of the 13th International Conference on Informatics in Control, Automation and Robotics (ICINCO 2016) - Volume 1, pages 347-352
ISBN: 978-989-758-198-4
Copyright
c
 2016 by SCITEPRESS – Science and Technology Publications, Lda. All rights reserved
347

where stochastic analysis is presented in order to pre-
dict the average switching rate; (Shi et al., 2008),
where time jittering is modeled as a random vari-
able uniformly distributed; (Alegria and Serra, 2010),
(Tatsis et al., 2010), where jitter effect is assumed as
a random variable normally distributed.
In (Angrisani et al., 2009), authors focus on zero-
order-hold DACs and, in particular, on how the pres-
ence of jitter that can affect their time base modifies
the desired features of the analog output waveform.
They study more deterministic jitter and develop an
analytical model which is capable of describing the
spectral content of the analog signal at the output of a
DAC, the time base of which suffers from (or is modu-
lated by) sinusoidal jitter. See also: (Guo et al., 2014),
which proposes a first order analytical model describ-
ing the influence of the sampling clock modulated by
a periodic jitter; (D’Apuzzo et al., 2010), where is in-
troduced a model capable of describing the function-
ing of a real DAC affected by horizontal quantization,
clock modulation, vertical quantization and integral
nonlinearity.
In this paper we prove one-sided energy inequality
for the output signal of an ideal DAC, in presence of
sampling clock jitter. Although the energy inequal-
ity can be derived for the Fourier transform by the
system of complex exponentials (Ingham, 1936), here
we present a direct proof, based on sinc functions and
on the result showed in (Montgomery and Vaughan,
1974). Denoting with f (t) the signal, we refer to the
following definition of energy.
Definition 1.1. The energy in the signal f (t) is
E
f
:=
Z
∞
−∞
| f (t)|
2
dt.
We also denote jitter as ε
n
, then the n-th sampling
timing of CLK is nT
s
+ ε
n
instead of nT
s
. Since we
have assumed that T
s
= 1, in our paper sampling tim-
ing of CLK is n + ε
n
but the results for T
s
6= 1 one
can obtain in an obvious way. Hence, equation (1)
becomes
f (t) =
∑
n∈Z
a
n
sinc(t − λ
n
), (3)
where λ
n
= n + ε
n
. Results obtained here concern
a generalization of the Parseval’s identity for the se-
quence of functions {sinc(t −λ
n
)}
n∈Z
, where λ
n
∈ R.
In fact, it is well-known that, for a signal such that
f (t) =
∑
n∈Z
a
n
sinc(t − n),
its energy is:
E
f
=
∑
n∈Z
|a
n
|
2
.
This is a Parseval identity for the sequence of func-
tions {sinc(t − n)}
n∈Z
, and it is based on the identity
Z
R
sinc

τ − λ

sinc

τ − ν

dτ = sinc(λ − ν). (4)
occurred for any real numbers λ and ν. But Parseval
identity ceases to be true if n is substitutes with λ
n
∈
R. This motivates the result of the paper, which is
described in the following Theorem.
Theorem 1.1. Let I = {n |1 6 n 6 R, R ∈ N} be a
finite set of integers, and let
f (t) =
∑
n∈I
a
n
sinc(t − λ
n
), (5)
where the λ
n
are real and satisfy
|λ
n
− λ
m
| > γ >
r
1
3
+
π
2
12
, ∀n, m ∈ I.
Then
E
f
> 1 − γ
−1
r
1
3
+
π
2
12
!
∑
n∈I
|a
n
|
2
. (6)
2 RESULTS
For the our purposes, we will use a well-known in-
equality. Hilbert’s inequality states that





∑
n6=m
a
n
¯a
m
n − m





6 π
∑
n
|a
n
|
2
for any set of complex a
n
, where the best possible
constant π was found by Schur (Schur, 1911). In
(Montgomery and Vaughan, 1974) authors obtained
a precise bound for the more general bilinear forms:
∑
n6=m
a
n
a
m
cscπ(x
r
− x
s
),
∑
n6=m
a
n
a
m
λ
r
− λ
s
.
In the following, kθk denotes the distance from θ
to the nearest integer, that is, kθk = min
n
|θ − n|.
Moreover, min
+
f will denotes the least positive value
when f ranges over a finite set of non-negative values.
We now give an useful Lemma.
Lemma 2.1. The inequalities
csc
2
πx + | cot πx csc πx| 6
1
4
kxk
−2
(7)
and
|cotπxcscπx| 6 π
−2
kxk
−2
(8)
hold for all real x.
ICINCO 2016 - 13th International Conference on Informatics in Control, Automation and Robotics
348

Figure 2: Graphic of g(θ) =
π
2
4
sin
2
θ − θ
2
(1 + cosθ) for
θ ∈ [0,π/2].
Figure 3: Graphic of sin
2
θ − θ
2
cosθ for θ ∈ [0,π/2].
Proof. Let θ = πx. We notice that, for an integer n,
0 6 kxk = min
n
|x − n| 6
1
2
and so 0 6 θ 6 π/2. For
inequality (7), it is sufficient to show that g(θ) > 0 in
[0,π/2], where
g(θ) =
π
2
4
sin
2
θ − θ
2
(1 + cos θ).
For inequality (8) one shows that:
sin
2
θ − θ
2
cosθ > 0
for θ ∈ [0,π/2]. See Figures 2 and 3.
Now we readapt and prove a part of Theorem 1,
taken from (Montgomery and Vaughan, 1974).
Lemma 2.2. Let x
1
,x
2
,...,x
R
and y
1
,y
2
,...,y
R
denote
real numbers which are distinct modulo 1, and sup-
pose that
δ = min
n,m
+
kx
n
− y
m
k, x
n
6= y
m
∀n,m = 1, . . . ,R.
Then





∑
n,m
a
n
a
m
cscπ(x
n
− y
m
)





6 δ
−1
r
1
3
+
π
2
12
R
∑
n=1
|a
n
|
2
.
(9)
where n and m are distinct.
Proof. Our proof is modelled on Montgomery and
Vaughan’s proof (Montgomery and Vaughan, 1974)
of Hilbert’s inequality. In (Montgomery and Vaughan,
1974) authors proven that the bilinear form
∑
n,m
a
n
a
m
cscπ(x
n
− x
m
),
where n 6= m, is skew-Hermitian. For this proof we
consider the bilinear form:
∑
n,m
a
n
a
m
cscπ(y
n
− y
m
)
for n 6= m. Let us consider
∑
n
a
n
cscπ(y
n
− y
m
) =
∑
n
a
n
c
n,m
where c
n,m
= csc π(y
n
− y
m
). The RHS is the product
of eigenvector a = (a
1
,..., a
R
)
t
for the mth column of
matrix C := (c
n,m
). Since the bilinear form under con-
sideration is skew-Hermitian, eigenvalues of matrix C
are all purely imaginary or zero, namely there exists a
real number µ such that: a
t
Ca = iµ. Hence,
∑
n
a
n
cscπ(y
n
− y
m
) = iµa
m
(10)
for m 6= n and 1 6 n,m 6 R. Also, we may normalize
so that
∑
n
|a
n
|
2
= 1. By Cauchy’s inequality,





∑
n,m
a
n
a
m
cscπ(x
n
− y
m
)





2
6
∑
n




∑
m
0
¯a
m
cscπ(x
n
− y
m
)




2
where
∑
m
0
means that all indexes are different. Also,
∑
n




∑
m
0
¯a
m
cscπ(x
n
− y
m
)




2
=
=
∑
m,p
¯a
m
a
p
∑
n
0
cscπ(x
n
− y
m
)cscπ(x
n
− y
p
)
= S
1
+ S
2
, (11)
where
S
1
=
∑
m
|a
m
|
2
∑
n
0
csc
2
π(x
n
− y
m
) (12)
and
S
2
=
∑
m6=p
¯a
m
a
p
∑
n
0
cscπ(x
n
− y
m
)cscπ(x
n
− y
p
).
(13)
In S
2
we may write
cscπ(x
n
− y
m
)cscπ(x
n
− y
p
) =
= cscπ(x
m
− y
p
)[cotπ(x
n
− y
m
) − cot π(x
n
− y
p
)].
According to (Montgomery and Vaughan, 1974)
(Proof of Theorem 1, p. 79) we use this to split S
2
in the following way: S
2
= S
3
− S
4
+ 2Re S
5
, where
S
3
=
∑
n,m,p
0
¯a
m
a
p
cscπ(y
m
− y
p
) cotπ(x
n
− y
m
), (14)
S
4
=
∑
n,m,p
0
¯a
m
a
p
cscπ(y
m
− y
p
) cotπ(x
n
− y
p
), (15)
and
S
5
=
∑
n,m
0
¯a
m
a
n
cscπ(x
n
− y
m
) cotπ(x
n
− y
m
). (16)
A Mathematical Model for Signal’s Energy at the Output of an Ideal DAC
349

We show now that S
3
= S
4
. We see from (10) and (14)
that
S
3
=
∑
n,m
0
¯a
m
cotπ(x
n
− y
m
)
∑
p
0
a
p
cscπ(y
m
− y
p
)
=
∑
n,m
0
¯a
m
cotπ(x
n
− y
m
)(−iµa
m
)
= −iµ
∑
n,m
0
|a
m
|
2
cotπ(x
n
− y
m
). (17)
Similarly, from (10) and (15),
S
4
=
∑
n,p
0
a
p
cotπ(x
n
− y
p
)
∑
m
0
¯a
m
cscπ(y
m
− y
p
)
=
∑
n,p
0
a
p
cotπ(x
n
− y
p
)(−iµ ¯a
p
)
= −iµ
∑
n,p
0
|a
p
|
2
cotπ(x
n
− y
p
). (18)
Therefore, S
3
= S
4
, so that S
1
+ S
2
= S
1
+ 2 Re S
5
6
S
1
+ 2|S
5
|. We use the inequality 2|a
n
a
m
| 6 |a
n
|
2
+
|a
m
|
2
in (16), so that (12) and (16) give
S
1
+ S
2
6
∑
m,n
0
|a
m
|
2
csc
2
π(x
n
− y
m
)+
+
∑
n,m
0

|a
n
|
2
+ |a
m
|
2

|
cscπ(x
n
− y
m
) cotπ(x
n
− y
m
)
|
=
∑
m,n
0
|a
m
|
2

csc
2
π(x
n
− y
m
)+
+
|
cscπ(x
n
− y
m
) cotπ(x
n
− y
m
)
|

+
+
∑
m,n
0
|a
n
|
2
|
cscπ(x
n
− y
m
) cotπ(x
n
− y
m
)
|
.
By Lemma 2.1 this is
6
1
4
∑
m
|a
m
|
2
∑
n
0
kx
n
− y
m
k
−2
+
+
1
π
2
∑
n
|a
n
|
2
∑
m
0
kx
n
− y
m
k
−2
.
A remark similar to that conducted in (Montgomery
and Vaughan, 1974), leads to be conclude that the x
n
and the y
m
are spaced from each other by at least δ, so
that
∑
m
0
kx
n
− y
m
k
−2
6 2
∞
∑
k=1
(kδ)
−2
=
π
2
3
δ
−2
.
Hence,
S
1
+ S
2
6
π
2
3
δ
−2

1
π
2
+
1
4

where we have considered
∑
n
|a
n
|
2
= 1.
We now able to prove the result of the paper.
Proof of Theorem 1.1. Put, by hypothesis,
γ = min
n,m
+
|λ
n
− λ
m
| >
r
1
3
+
π
2
12
.
Write
R
∞
−∞
| f (t)|
2
dt:
∑
m,n
a
n
¯a
m
Z
+∞
−∞
sinc(λ
n
−t)sinc(λ
m
−t)dt
which is equal to
∑
n
|a
n
|
2
+
∑
m,n
0
a
n
¯a
m
sinc(λ
n
− λ
m
). (19)
Furthermore,
sinπ(λ
n
− λ
m
)
π(λ
n
− λ
m
)
=
1
πλ
n
sinπ(λ
n
−λ
m
)
−
πλ
m
sinπ(λ
n
−λ
m
)
=
1
x
n
+ x
m
where x
n
:=
πλ
n
sinπ(λ
n
−λ
m
)
. Putting y
m
= −x
m
above
equality is rewritten as
1
x
n
−y
m
, and
∑
m,n
0
a
n
¯a
m
sinc(λ
n
− λ
m
) =
∑
m,n
0
a
n
¯a
m
x
n
− y
m
.
To prove the Theorem, we note that if x is any member
of a bounded interval, then kεxk = ε|x| whenever ε is
sufficiently small. Moreover,
1
x
n
− y
m
= lim
ε→0
πεcscπε(x
n
− y
m
)
so that we can appeal to Lemma 2.2:





∑
m,n
0
a
n
¯a
m
x
n
− y
m





= πε





∑
m,n
0
a
n
¯a
m
cscπε(x
n
− y
m
)





6 πεδ
−1
r
1
3
+
π
2
12
∑
n∈I
|a
n
|
2
,
where, for ε → 0,
δ = min
n,m
+
kεx
n
− εy
m
k = εmin
n,m
+
|x
n
− y
m
|,
x
n
6= y
m
∀n,m = 1, . . . ,R.
Since x
n
:=
πλ
n
sinπ(λ
n
−λ
m
)
, y
m
= −x
m
,
δ = εmin
n,m
+




πλ
n
− πλ
m
sinπ(λ
n
− λ
m
)




and since
|
sinπ(λ
n
− λ
m
)
|
6 1, we have
δ > επmin
n,m
+
|λ
n
− λ
m
| = επγ
Accordingly,





∑
m,n
0
a
n
¯a
m
x
n
− y
m





= πε





∑
m,n
0
a
n
¯a
m
cscπε(x
n
− y
m
)





ICINCO 2016 - 13th International Conference on Informatics in Control, Automation and Robotics
350

6 γ
−1
r
1
3
+
π
2
12
∑
n∈I
|a
n
|
2
.
Thus, an appeal to (19) completes the proof of the
Theorem:
E
f
> 1 − γ
−1
r
1
3
+
π
2
12
!
∑
n∈I
|a
n
|
2
.
As one reads on (Montgomery and Vaughan,
1974), it follows from a paper of Hellinger and
Toeplitz ((Hellinger and Toeplitz, 1910) and (Mont-
gomery and Vaughan, 1974)) that Theorem 1.1 and
Lemma 2.2 hold also for infinite sums, provided that
min
+
f is replaced by inf
+
f . It is also possible to
consider bilateral series if we put λ
−n
= −λ
n
for
n = 1,2,....
An estimate from above is immediate employing
same steps involved used in the proof of theorem 1.1.
Indeed, from equation (19) and by triangle inequality:
∑
n
|a
n
|
2
+
∑
m,n
0
a
n
¯a
m
sinc(λ
n
− λ
m
) 6
6 1 + γ
−1
r
1
3
+
π
2
12
!
∑
n
|a
n
|
2
where γ is defined as in theorem 1.1.
Corollary 2.3. Let I = {n |1 6 n 6 R, R ∈ N} be a
finite set of integers, and let
f (t) =
∑
n∈I
a
n
sinc(t − λ
n
), (20)
where the λ
n
are real and satisfy
|λ
n
− λ
m
| > γ >
r
1
3
+
π
2
12
, ∀n, m ∈ I.
Then
E
f

∑
n∈I
|a
n
|
2
. (21)
Remark 2.4. Write E
f

∑
n∈I
|a
n
|
2
means that
c
1
∑
n∈I
|a
n
|
2
6 E
f
6 c
2
∑
n∈I
|a
n
|
2
with two constants c
1
,c
2
> 0, independent of the
particular form of f (t), except for the assumption
|λ
n
− λ
m
| > γ >
q
1
3
+
π
2
12
, ∀n,m ∈ I.
3 CONCLUSIONS
In this paper we have obtained one-sided energy in-
equality for the output signal of an ideal DAC, in pres-
ence of sampling clock jitter. Mathematically, it is tra-
duced in a generalization of the Parseval’s identity for
the sequence of functions {sinc(t − λ
n
)}
n∈Z
, where
λ
n
∈ R. In fact, it is well-known that, for a signal
such that
f (t) =
∑
n∈Z
a
n
sinc(t − n),
its energy is:
E
f
=
∑
n∈Z
|a
n
|
2
.
But Parseval identity ceases to be true if n is substi-
tutes with λ
n
∈ R. This motivates the result of the
paper, which is described by Theorem 1.1.
In further works, we intend to consider more com-
plex systems than ideal DACs. In (Angrisani et al.,
2009) a zero-order-hold DAC is considered:
f
ZOH
(t) =
∞
∑
n=−∞
f (λ
n
) rect

t − λ
n
T
T

(22)
where λ
n
= n + ε
n
. Paper by Angrisani and D’Arco
focuses on how the presence of jitter that can affect
their time base modifies the desired features of the
analog output waveform. Then, in further works, it is
legitimate to investigate, mathematically, how much
jitter a good ZOH device can tolerate.
REFERENCES
Abidi, A. (2006). Phase noise and jitter in CMOS ring os-
cillators. IEEE J. Solid-State Circuits, 41:1803–1816.
Alegria, F. and Serra, A. (2010). Gaussian jitter-induced
bias of sine wave amplitude estimation using three-
parameter sine fitting. Instrumentation and Measure-
ment, IEEE Transactions on, 59:2328–2333.
Angrisani, L., D’Apuzzo, P., and D’Arco, M. (2009). Mod-
eling timing jitter effects in digital-to-analog convert-
ers. IEEE Trans. Instrum. Meas, 58:330–336.
Corradini, L., Bjeletic, A., Zane, R., and Maksimovic, D.
(2011). Fully Digital Hysteretic Modulator for DC-
DC Switching Converters. IEEE Trans. on Power
Electronics, 26:2969–2979.
D’Apuzzo, M., D’Arco, M., Liccardo, A., and Vadursi, M.
(2010). Modeling DAC Output Waveforms. IEEE
Trans. Instrum. Meas, 59:2854–2862.
Demir, A., Mehrotra, A., and Roychowdhury, J. (2000).
Phase noise in oscillators: a unifying theory and nu-
merical methods for characterization. IEEE Trans.
Circuits Syst. I, Fundam. Theory Appl., 47:655–674.
Guo, Y., Zhang, Z., Hui, Z., Zeng, X., and Cheng, X.
(2014). First Order Analytical Model for Determin-
istic Jitter in Digital-to-Analogue Converters. Infor-
mation Science and System Science.
Hajimiri, A. and Lee, T. (1998). A general theory of phase
noise in electrical oscillators. IEEE J. Solid-State Cir-
cuits, 33:179–194.
Hellinger, E. and Toeplitz, O. (1910). Grundlagen fur eine
Theorie der unendlichen Matrizen. Mathematische
Annalen, 69:289–330.
A Mathematical Model for Signal’s Energy at the Output of an Ideal DAC
351

Ingham, A. E. (1936). Some Trigonometrical Inequalities
with Applications to the Theory of Series. Math. Z.,
41:367–379.
Kurosawa, N. (2002). Sampling clock jitter effects in
digital-to-analog converters. Measurement, 31:187–
199.
Manolakis, D. G. and Ingle, V. K. (2011). Applied digital
signal processing: theory and practice. Cambridge
University Press.
Montgomery, H. L. and Vaughan, R. C. (1974). Hilbert’s
inequality. J. London Math. Soc., 8:73–82.
Razavi, B. (1996). A study of phase noise in CMOS oscil-
lators. IEEE J. Solid-State Circuits, 31:331–343.
Reinhardt, V. S. (2005). A review of time jitter and digital
systems. In Proceedings of the 2005 IEEE Interna-
tional Frequency Control Symposium and Expositio,
pages 38–45.
Schur, I. (1911). Bemerkungen zur Theorie der beschrank-
ten Bilinearformen mit unendlich vielen Verander-
lichen. J. Reine Angew. Math., 140:1–28.
Shi, Q., Gong, Y., and Guan, Y. L. (2008). Asynchronous
classification of high-order qams. In Wireless Commu-
nications and Networking Conference, 2008. WCNC
2008. IEEE, pages 1188–1193.
Tatsis, G., Votis, C., Raptis, V., Christofilakis, V., and
Kostarakis, P. (2010). A/D restrictions (errors) in
Ultra-Wideband Impulse Radios. Int. J. Communica-
tions, Network and System Sciences,, 3:425–429.
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