Design of Traffic Light based on FPGA
Xiaomin Han
1, a
, Shuzhen Huang
1
, Xiaohong Wang
1
, Yuying Ma
1
1
Shandong Vocational and Technical University of Engineering, Jinan 250200, China
Keywords: VHDL; traffic light; FPGA.
Abstract: This paper uses Altera's 5CSEMA5F31C6N chip to realize the hardware circuit description of the traffic
light system controller through VHDL language. It is compiled, simulated and downloaded to the FPGA
device for programming in Altera's EDA software platform Quartusii environment. The control process of
the traffic light system.
1 INTRODUCTION
With the increase of vehicles, traffic travel has
become a concern of everyone. Good traffic light
design can alleviate traffic pressure and ensure good
traffic order. This paper uses FPGA-based DE1-
SOC development board to simulate the intersection
traffic light. In addition to the basic traffic function,
the system also has a countdown function, which
simulates the actual traffic intersection. Provide a
theoretical basis for the actual traffic intersection.
Advantages of adopting VHDL language: (1)
powerful and flexible design; (2) modular and easy
to install; (3) reliable and easy to modify.
2 TRAFFIC SIGNAL CONTROL
TASKS
The intersection traffic light designed in this paper
has the function of indicating the opening and
stopping. Red, green and yellow signal lights and
digital tube displays are installed at each entrance.
Traffic rules: When the east-west direction is
open, when the north-south direction is forbidden,
the green light in the east-west direction is bright for
39 seconds, then the yellow light is on for 4 seconds,
the red light is bright, and the south-south direction
is red for 43 seconds, and the green light is bright.
When the north-south direction is open, when the
east-west direction is prohibited, the green light in
the north-south direction is bright for 20 seconds,
then the yellow light is on for 4 seconds, the red
light is bright, the east-west direction is red light for
24 seconds, and the green light is bright. Loop in
turn.
There is a set of countdown monitors in both the
east and west directions to show the passage time
and the forbidden time.
3 OVERALL DESIGN
This design is based on FPGA to complete the traffic
light control system. The 5CSEMA5F31C6N is used
as the core controller of the control system. The
three design entities are used to implement the
traffic light design in VHDL language, including:
crossover design entity, traffic signal light and
digital tube display circuit design entity, top-level
design entity (Qing Zhang, Xiaoping Cao, 2017).
4 DESIGN OF VARIOUS PARTS
OF THE SYSTEM
4.1 Frequency Division Circuit Design
The frequency of the DE1-SOC development board
is 50MHZ. This design requires 1HZ frequency, so
the process design and if...else statement are used to
complete the crossover design (Rundong Bi, Bo Gao,
2016). The schematic diagram module is shown in
Fig.1: