problem in the condition of high temperature with
high voltage and large current. In the process of
reliability testing and servicing, it is common to find
delamination between epoxy molding compound
(EMC) and the lead frame, as well as the micro-chip
and substrate, which leads to a series of failure
modes, such as plastic strain crack, passivation layer
damaged, leakage current increased, PN junction
damaged, etc (AndrewA.O.Tay, 1996).
Normally, there is boundary layer (transition
layer) between the copper substrate and epoxy
molding compound (EMC) in PEM. The transition
layer, different with other part of epoxy molding
compound, is the weakest position of all adhesive
interface, and makes the delamination occurring and
spreading under the stress of thermal and humidity.
If the delamination occurs between EMC and chip, it
will cause an increase in the bonding wire resistance
as well as leakage current and decrease in
breakdown voltage even turn to open-circuit due to
mechanical tensile damage, also the passivating
layer are destroyed, which provides an easier
channel for the moisture immersing into the chip
surface and lead to the metal layer corrosion; While
if the delamination occurs between EMC and copper
substrate or lead frame, it will lead to Popcorn
Effect, while provides an channel for the moisture
immersing. In conclusion, once the delamination
occurs between EMC and other material, even if the
area is small, it will become the source of
delamination, and gradually expand in the actual
usage by thermal stress or mechanical stress until it
fails (PoPeom, 1995; Sheng Nian, 2014). The table
below shows the failure analysis of PEM in main
operating stress.
Table 1. The analysis of PEM in main operating stress.
No. Failure Mode
Failure
Mechanism
1
Die crack,
die adhesive failure
Temperature
stress
2
leakage current increased,
PN junction damaged
Thermal-
electric stress
3
Migration intermetallic
compound, Ohmic contact
degradation
Thermal
stress
4 Delamination
Humid-
thermo stress
3 RELIABILITY EVALUATION
OF OVER-TEMPERATURE
USING OF PEM
3.1 Select the Test Methods
Based on the analysis above, as well as combining
with GJB 7400-2011 “General specification for
semiconductor integrated circuits of qualitied
manufacturer certification” (G. Eason, et.al, 1955),
which is used to qualify the PEM used in military,
the high temperature storage, HAST, Temperature
cycle, and Steady state life test which are chosen to
qualify the reliability of PEM. Besides, the external
visual inspection, electrical performance test in room
temperature and Scanning Acoustic Microscope
(SAM) test are conducted after each test.
Meanwhile, in order to verify whether the different
temperature have different impact in structure and
performance for PEM, comparative tests are also
carried out.
3.2 Select the Test PEMs
This paper selects PEM ADV7123KSTZ140 as the
test sample. The maximum operating temperature
specified in the device manual is 85°C, but it is
tested the maximum operating temperature in actual
use is 115°C.
In order to verify whether the device at 85°C and
115°C temperature stress have the different impacts
on the performance and structure, 20 fully qualified
devices are selected to test under the manual
regulation temperature stress 85°C, marked as 1-1;
20 fully qualified devices are selected to test under
the actual temperature stress 115°C, marked as 2-1;
20 fully qualified devices with delamination
(without pins) at the lead frame are selected to test
under the manual regulation temperature stress
85°C, marked as 1-2; 20 fully qualified devices with
delamination (without pins) at the lead frame are
selected to test under the actual temperature stress
115°C, marked as 2-2. The devices information and
the test method are shown in table 2.
3.3 Process of the Tests
3.3.1 High Temperature Storage
After the high-temperature storage test for 48hours,
it is found that the functional performance
parameters of these 4 groups do not change too
much, and the delamination area of the 1-2 and 2-2