file will be used during the build of the simula-
tor, for producing the files UppaalPacket m.h and
UppaalPacket m.cc, which contains the C++ model
of the packet itself. The header UppaalPacket m.h
will be imported by all the classes sending and re-
ceiving application layer packets.
Nodes’ Applications. The Interpreter produces one
application for each XML tag template. Each node
of the network runs a certain application, namely tem-
plate, in its application layer simple module. From an
overall point of view, an application is made by:
• one NED description of the simple module exe-
cuting the application;
• a set of C/C++ files implementing the application
itself.
In detail, each application is provided with a Fi-
nite State Machine (FSM), that implements the be-
havior described by the XML template. Referring to
the content of the XML tag template:
• each location accounts for one FSM’ state;
• each transition accounts for one FSM’s transi-
tion.
Moreover, the application is provided with the
FSM’s transition map, used to let the FSM evolve.
All of FMS’s transitions implements the following ab-
stract functions:
bool
AbstractTransition::checkGuard();
bool
AbstractTransition::doSynchronization();
std::string
AbstractTransition::doAssignments();
The functions checkGuard, doSynchronization,
and doAssignments implement the UPPAAL tran-
sition’s guard, synchronization and assignments, re-
spectively.
The FSM evolves according to the node’s clock,
through the execution of transitions, namely perform-
ing the UPPAAL transition’s assignments. At each
clock tick, the application retrieves all the outgoing
transitions for the current node from the FSM transi-
tion map. Then, it executes the transition that satisfies
both the guard and the synchronization conditions. If
no transition is possible, the FSM does not evolve in
the current clock frame. Conversely, if more transi-
tions can be performed, the application executes one
of them randomly.
Nodes Synchronization. In Castalia, nodes asyn-
chronously communicate with each other. Moreover,
when transmitting, nodes broadcast packets. UP-
PAAL transmission and reception synchronizations
are supported in Castalia in two different ways.
Transitions containing a transmission synchro-
nization can be always executed if the related guard
is satisfied. A UPPAAL transmission synchroniza-
tion, for example on channel 0, i.e. message[0]!, re-
sults in the broadcast of a UppaalApplication packet,
as shown in the following code:
UppaalPacket* uppaalPacket;
uppaalPacekt = new UppaalPacket(nodeid);
toNewtorkLayer(uppaalPacket, BROADCAST);
After the packet is broadcasted, it is received by
all nodes positioned inside the sender’s transmission
range.
To support the UPPAAL reception synchroniza-
tion, each node is provided with a reception buffer on
the application layer. Such a buffer follows the FIFO
policy. Nodes store UppaalPackets into the reception
buffer as soon as they are received.
Then, when a reception transition is executed, for
example on channel 0, i.e. message[0]?, it results in
the scanning of the reception buffer, looking for the
first UppaalPacket received from Node 0. If the target
UppaalPacket is found, then the transition is executed.
Otherwise, the FSM does not evolve in the current
clock frame.
3.3.3 Integration and Run
The System Integrator bundles the files produced by
the Interpreter with Castalia, then builds the simula-
tor. When the build ends, the UPPAAL model can be
simulated on Castalia. It is worth noting that Castalia
makes it possible to have several different configura-
tions for the same WSN, without re-build the simula-
tor.
Then, a certain WSN model may have several dif-
ferent configurations that differ from each other due
to: i) the positioning of the nodes; ii) the latency of the
channel; iii) the bottom layers protocols; iv) or other
tuning parameters. Batch processing can be used for
simulating a large number of different configurations
for a certain WSN model, with the aim of validating
a large number of different scenarios through simula-
tion.
In the following, it is shown a sample of a simula-
tion report provided by Castalia, when simulating the
attack free scenario. In detail, it lists the packets re-
ceived by Node 4 during a simulation run. The clock
period of all nodes is 100 ms.
ForSE 2020 - 4th International Workshop on FORmal methods for Security Engineering
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