Automatic Code Generation for a Seamless Low-cost Development
Platform
Sven Jacobitz and Xiaobo Liu-Henke
Ostfalia University of Applied Sciences, Department of Mechanical Engineering, Institute for Mechatronics,
Salzdahlumer Str. 46/48, 38302 Wolfenb
¨
uttel, Germany
Keywords:
Automatic Code Generation, Model Transformation, Rapid Control Prototyping, Model Based Design, Open
Source.
Abstract:
The automatic generation of Electronic Control Units (ECU) software from functional models is becoming
an increasingly important part of the development process. At first, this paper presents the demand towards
a tool chain for functional development of embedded systems and then introduces the low-cost development
platform LoRra on the basis of the seamless model-based rapid control prototyping development process. The
core of the paper is the conception and realization of the automatic code generator of the LoRra platform. It
generates modular, flexibly usable C code, suitable for real-time implementation on a microcontroller. The
code is generated from models of the open source CAE software Scilab / Xcos, which can be used across
domains. A simple case study is used to verify the function of the generated code under real-time conditions.
1 INTRODUCTION
A key challenge for innovative enterprises today is
to develop ever more complex products to production
maturity ever more quickly. To meet the growing re-
quirements resulting from this, more and more hard-
ware, software and technical systems are being inte-
grated. The core of the resulting embedded mecha-
tronic systems are Electronic Control Units (ECU)
with the intelligent signal processing functions imple-
mented on them. Due to the rapidly increasing scope
of functionality and degree of networking, this results
in increasingly complex software components (Akdur
et al., 2021).
To enable small and medium-sized enterprises
(SMEs) to offer mechatronic products competitively,
a seamless, highly automated low-cost rapid control
prototyping development platform (LoRra) was de-
veloped at Ostfalia as part of an EU-funded research
project. This is being used in the Lower Saxony
Future Laboratory for Mobility to design intelligent
functions.
This paper introduces the automatic code genera-
tion approach of the LoRra platform, which contains
a model-to-text transformation for functions modeled
the open source CAE tool Scilab / Xcos. The rest
of the paper will be structured as follows. In sec-
tion 2 the LoRra platform for rapid control proto-
typing (RCP) is introduced, followed by the state of
knowledge for automatic code generation in section 3.
The concept of the code generator is introduced in
section 4 and the realization is described in section 5.
Finally, the results of the case study are presented in
section 6. The paper closes with an conclusion and
outlook to future work in section 7.
2 RCP USING THE LoRra
PLATFORM
RCP is a seamless, verification-oriented methodol-
ogy for the development of complex ECU functions
(e.g. closed-loop control systems) (Liu-Henke et al.,
2021). It is effectively used in the automotive and
aerospace industries. Through the consistent use of
models, RCP enables the testing of functions at an
early stage of development (Hanselmann, 1996). The
whole process is accompanied by Model-in-the-Loop
(MiL), Software-in-the-Loop (SiL) and Hardware-in-
the-Loop (HiL) simulations. It can be subdivided into
the process steps model building, analysis and synthe-
sis, automated code generation, automated implemen-
tation and online experiment (L
¨
uckel et al., 2001).
The basis are simulations of the functional behav-
ior, usually described by a block diagram model, in a
294
Jacobitz, S. and Liu-Henke, X.
Automatic Code Generation for a Seamless Low-cost Development Platform.
DOI: 10.5220/0010894300003119
In Proceedings of the 10th International Conference on Model-Driven Engineering and Software Development (MODELSWARD 2022), pages 294-301
ISBN: 978-989-758-550-0; ISSN: 2184-4348
Copyright
c
2022 by SCITEPRESS Science and Technology Publications, Lda. All rights reserved
combination with a simulation of the controlled sys-
tem.
As illustrated in Figure 1, a Computer Aided Engi-
neering (CAE) tool chain is used throughout the entire
RCP process. The combination of Matlab / Simulink
and dSPACE is often used in the industry. It sup-
ports the process by several tools. Since high costs
are associated with the acquisition and maintenance,
the low-cost alternative LoRra was developed as part
of several research projects at Ostfalia (Jacobitz and
Liu-Henke, 2020). LoRra is based on low-cost soft-
ware and hardware and is suitable for the develop-
ment of functions in a wide variety of domains due to
its modular, flexible structure.
Version Datum Verwendung Quelle Titel
1.4en 10.07.2019 diverses {Liu-Henke
2015 #77}
Konzept LoRra
Low-Cost
Scilab/Xcos
Xcos-Coder
Xcos specific code
Microcontroller
Gap in the process:
Need for action!
Gap in the process:
Need for action!
Gap in the process:
Need for action!
Modelling
Automatic C-Code
generation
Automatic
implementation
Target Hardware
RCP step
Online experiment
with HMI
RCP development platform
Analysis and Synthesis
High-Cost
Matlab / Simulink
expensive
Simulink Coder
expensive Toolbox
e.g. Scalexio system
expensive
Real-Time Interface
expensive
ControlDesk
expensive
Model libraries
expensive
Modelling
Automatic C-Code
generation
Automatic
implementation
Target Hardware
RCP step
Online experiment
with HMI
RCP development platform
Analysis and Synthesis
LoRra-iGES
For online measurement
and calibration
LoRra-RTI
executable program file
LoRra approach
Scilab/Xcos
LoRra-Code-generator
efficient and adaptable code
Microcontroller
LoRra model libraries
Figure 1: RCP development process with high-cost solution
and LoRra approach (Jacobitz and Liu-Henke, 2020).
The open source tool Scilab / Xcos is used as
the central CAE environment, which is suitable for
simulating hybrid systems from a wide variety of
domains (Nikoukhah, 2006). With the help of the
model library, various continuous-time and discrete-
time model components can be reused and parame-
terized. Through the LoRra code generator, efficient
C code, executable on low-cost target hardware such
as a microcontroller, is generated. Using the LoRra
Real-Time Interface (RTI) (Jacobitz and Liu-Henke,
2019), this code is then automatically implemented
into a run time environment and linked to the inter-
faces of the target hardware. A microcontroller is then
used to run the real-time simulation and to carry out
the online experiments. The measurement and cali-
bration tasks during these experiments are supported
by the human-machine interface iGES.
3 STATE OF KNOWLEDGE
Automatic code generation is an essential part of the
RCP process. It leads to reproducible results as well
as a fast implementation of the function designed
and tested in the simulation model. Moreover, it
avoids random errors and can generate highly effi-
cient code due to special hardware-related optimiza-
tions (Toeppe et al., 1999). The basis for automatic
code generation is the model-to-text transformation of
the function model, which is usually given by a block
diagram model.
In the automotive industry, automatic code gen-
erators have become standard development tools for
ECU functions (Franco et al., 2016). Even in the
aerospace industry, functions are frequently devel-
oped with the help of automatic code generators. The
market offers a correspondingly large selection of dif-
ferent solutions and systems.
The CAE tool Matlab/Simulink is widely used
in industry. With the extensions Simulink Coder
and Embedded Coder, Simulink models can be trans-
formed into universally usable or target hardware-
specific optimized code (Lambersk
´
y et al., 2014).
Many additional extensions are also available, e.g.
for linking hardware peripherals. With TargetLink,
dSPACE also offers a powerful production code gen-
erator that generates highly efficient code while tak-
ing target hardware-specific optimization criteria into
account (Hanselmann et al., 1999).
The open-source CAE tool Scilab / Xcos, succes-
sor of Scicos developed within the Metalau project,
has an integrated code generator. This generates C
code for independent system simulation (so-called
standalone simulation), which is intended for use with
a functional mock-up interface, for example (Bucher
and Balemi, 2005). For execution on a microcon-
troller under real-time conditions without manual ad-
justments, this is not suitable due to the program and
memory structure.
Extensions such as X2C (Grabmair et al., 2014),
developed at the Linz Center of Mechatronics, can
also be used to generate efficient code from Xcos
models that can be executed on microcontrollers.
However, these extensions do not have the necessary
interfaces for integration in the LoRra RCP process.
To realize a seamless low-cost RCP development plat-
form, the LoRra code generator, which is the core of
this paper, was therefore designed and realized.
4 CONCEPTION OF THE LoRra
CODE GENERATOR
The basis for consistent use in the cost-effective RCP
development platform LoRra is the efficient and at
the same time flexible transformation of Xcos mod-
els into microcontroller-suitable C code. Basics of
modelling and simulation using Xcos, as well as the
Automatic Code Generation for a Seamless Low-cost Development Platform
295
mathematical background can be found in (Campbell
et al., 2010). The generated code must correctly re-
produce the model behavior, be reusable at the same
time, and have interfaces for integration into a real-
time environment (e.g. for the step from SiL to HiL
simulation).
To achieve these goals, the LoRra code genera-
tor is designed modularly with open interfaces. Fig-
ure 2 illustrates the concept of code generation from
Xcos models, using the LoRra code generator. First,
a distinction is made between functional behavior of
the individual blocks (section 4.1) and a topological
description (section 4.2) - the interconnection of the
blocks with each other. Transformation algorithms
(section 4.3), which rely on external libraries, per-
form the model-to-text transformation and generate
the code for the LoRra Code Interface (LCI - sec-
tion 4.4).
Version Datum Verwendung Quelle Titel
2.0en 25.10.2021 Konzept Codegenerator
Transformation
algorithms
LCI interface
- Initialization
- Output calculation
- State calculation
- Derivation calculations
- Event calculation
-
Topological description
1
̇
1
2
Input
1
1
Const. Const.
Product
Add
Product
Integrator
Output
1
Functional behavior
Xcos model
External
libraries
LoRra code generator
Figure 2: Concept of the LoRra code generator.
4.1 Functional Behavior
The functional behavior of a Xcos model is described
by blocks, which establish a relationship between the
inputs and outputs. A block in the model can be a
basic block or a hierarchy block. Hierarchy blocks
consisting of a subordinate model. For code gener-
ation, they are dissolved through their basic blocks
and topology. Their structure is only kept in the LCI
description (cf. section 4.4). Basic blocks establish
an atomic functional relationship between their inputs
and outputs and can thus be interpreted as operators of
the model.
Xcos performs hybrid simulations of continuous-
time and discrete-time systems. For this purpose, it
distinguishes between regular (time continuous) and
event (time discrete) signals. Figure 3 illustrates the
functional relationship between inputs and outputs of
a basic block. Using the general nonlinear state space
representation of a dynamic system with the continu-
ous states x, the discrete-time states z and the parame-
ter vector r, the relationship between the l regular in-
puts u and outputs y, where l is the number of regular
inputs and k the number of regular outputs, is estab-
lished (Nikoukhah and Steer, 1996). When the block
is activated by an event input d, the discrete-time
states and the event delay vector e
vz
are calculated
according to Eq. (1). In addition, a non-continuous
change of the continuous states can also occur here.
An event d
i
is described by an impulse function at
time t
E
(Campbell et al., 2010).
[x,z]
T
= f
2
(x,z,u,d, r,t
E
)
e
vz
= f
3
(x,z,u,d, r,t
E
)
(1)
Version Datum Verwendung Quelle Titel
1.0 11.10.2021 Ein- und Ausgänge eines Xcos Blocks
1
2
1
2
1
2
1
2
,1
,2
,
̇ =
0
, , , ,
=
1
, , , ,
Ausgeführt bei Event Activation:
,
=
2
, , , , ,

=
3
, , , , ,
Notation nach Engell.1997 / Krogh.Aug.1993 / Thoma.2002
Figure 3: Functional relationship between inputs and out-
puts of a basic block.
4.2 Topological Description
The model topology is represented by a directed multi
edge graph G according to Eq. (2). The basic blocks,
represented by a set of nodes V , are thereby linked
by regular edges R and event edges E. The definition
of regular edges is represented by Eq. (3), where v is
called the source node and w is called the target node.
Event edges behave equivalently, where event inputs
and outputs are linked.
G =
{
V,R,E
}
(2)
R =
{
v,w
}
: v,w V
y w
u v
(3)
MODELSWARD 2022 - 10th International Conference on Model-Driven Engineering and Software Development
296
4.3 Transformation Algorithms
The transformation algorithms perform the model-to-
text transformation. They consist mainly of two parts:
the function code generation and the linking of code
components.To generate the functional related code
of the basic blocks, detailed information about the
block operations are required. This is given by the
nonlinear state space representation, presented in sec-
tion 4.1. The algorithms, describing the block behav-
ior are stored in transformation rules. A distinction is
made here between three basic elements (Deppe and
Homburg, 1999):
Indirect Link Calculation (ND): The calculated
outputs do not depend on the inputs without delay
(e.g. due to integration):
y|y v
y
u
= 0
Direct Link Calculation (D): The calculated
outputs depend on the inputs without delay:
y|y v
y
u
6= 0
State Calculation (S): Calculation of discrete
states and derivatives of continuous states.
This is necessary for a correct calculation sequence
especially for distributed simulation using multiple
computing units. Additionally, there must be algo-
rithms for the event calculations (E), performed dur-
ing event activation, which contain the evaluation of
Eq. (1).
The generated components of the functional code
are linked to the LCI-based C code under consider-
ation of the calculation sequence in such a way that
the ND calculations are carried out first, since no in-
formation on the block inputs are necessary for this.
Then, the signals to calculate the D outputs are avail-
able. Finally the S calculations could be done. The
generated fragments of the ND, D, S and E calcula-
tion are merged and stored persistently.
4.4 LoRra Code Interface
The LCI aims at the reusability and universal applica-
bility of the generated code. In addition to the code,
information about the hierarchical model structure as
well as the interfaces are stored in suitable data for-
mats and integrated into an LCI package. Figure 4
illustrates the principle.
Standardized data structures and interfaces are
provided so that a function can be used without
knowledge of the inner structure of the code. Open in-
terfaces for model initialization, calculation of block
outputs (ND, D) and states (S) form the basis for the
reusability of a generated function.
Version Datum Verwendung Quelle Titel
1.0en 18.10.2021 diverses Konzept des LCI
Code generation
Xcos
model
C-Code
Model structure
Interface
information
LCI package
Figure 4: Concept of the LCI.
5 REALIZATION OF THE LoRra
CODE GENERATOR
The code generation according to the concept from
Figure 2 is realized by the process model shown in
Figure 5. First, the distinction between functional be-
havior and topology as well as a preparation of the
model structure is done by a pre-processing. Then,
the transformation is done by the transformation al-
gorithms. Last, a post-processing takes place, which
outputs the LCI package.
Version Datum Verwendung Quelle Titel
2.0en 28.06.2019 Ablaufdiagramm Codegenerator kurz
Preprocessing of
the model
Xcos
model
LCI
package
Transformation
algorithms
Post-
processing
Figure 5: Process of automatic code generation.
5.1 Pre-processing of the Model
The pre-processing is used to prepare the model
topology and to store it in a data structure, suitable
for code generation. The results are a flat data flow
graph G, defined by Eq. (2), and the LCI informa-
tion for model structure and interfaces. The following
steps are performed during pre-processing:
Composition of the data flow graph
Check for unsupported topology structures
Optimization of topology
Determination of the calculation sequence
A model-to-model transformation first transforms the
Xcos model into a data flow graph. Here, all infor-
mation relevant for code generation are transferred
and superfluous properties (e.g. for graphical repre-
sentation) are discarded. Hierarchy blocks are dis-
solved, resulting in a flat graph only consisting of ba-
sic blocks. For each basic block, the relevant data
Automatic Code Generation for a Seamless Low-cost Development Platform
297
for code generation (e.g. variable names, dimensions
of inputs and outputs) are stored in a corresponding
structure. In addition, not explicitly given sizes of
regular signals are determined by backpropagation.
The structure of G is verified. Mainly this con-
tains the search for algebraic loops, which can be de-
tected as a cycle in the graph. Therefore, a depth-first
search is performed, starting from the source nodes
defined by Eq. (4). Sinks, defined by Eq. (5) are han-
dled as leaf nodes. Going further, an optimization of
the graph structure can be done at this point. Here,
graph theory algorithms such as semantic matching
or intelligent AI-based methods can be used to opti-
mize various key performance indicators such as the
number of nodes or the over all complexity.
V
r
V v V
r
: l = 0 (4)
V
s
V v V
s
: l > 0 k = 0 (5)
In a final step, the calculation sequence O is de-
termined. It specifies the order in which outputs of
the blocks must be calculated in order to avoid in-
consistencies. Starting with the set of root nodes V
r
according to Eq. (4), a breadth-first search based on
algorithm 9 is performed therefore. The algorithm is
performed, as long as the queue Q is not empty. The
first element q is taken from the queue. If all prede-
cessor nodes N
G
(q) were visited and q is not already
within the calculation sequence, it is added. If q is not
a signal sink according to Eq. (5), all successor nodes
N
+
G
(q) of q are added to the queue.
Data: Set of root nodes V
r
Result: Calculation sequence O
1 Q V
r
;
2 while Q 6= do
3 q first element of Q;
4 Q Q {q};
5 if N
G
(q) O ¬q O then
6 O O
{
q
}
;
7 Q Q N
+
G
(q);
8 end
9 end
Algorithm 1: Breadth-first search for determining the cal-
culation sequence.
5.2 Transformation Algorithms
A rule-based transformer is implemented to generate
the function code. For each supported basic block,
transformation rules that reflect the state space equa-
tion introduced in section 4.1 must be defined. The
Scilab language is used as a descriptor for the trans-
formation rules. The conceptual structures of an Xcos
model defined by the provided basic blocks. Mainly,
there is made a distinction between the calculation of
state derivations (defined by the function f
0
in Fig-
ure 3), calculation of the outputs (defined by the func-
tion f
1
in Figure 3) as well as the event based calcula-
tions defined by (1). The LoRra code generator uses
the individual given transformation rules to map these
functions to the ND, D, S and E calculations.
The generated pieces of code are integrated into
a LCI conform C-Code by using a template based
approach. Thereby, the calculation sequence, deter-
mined by algorithm 1 is kept. Listing 1 contains the
template for calculating the outputs as an example.
The generated code components and other relevant in-
formation can be accessed via a predefined structure.
1 l c i _status_t < lcg : f u nctionNa m e >
_ca l c O u t p u t s ( uint8_t iCall e r ) {
2
3 // Indirect link calculations
4 < lcg : c ode . calcND >
5
6 // Direct link calculations
7 < lcg : c ode . calcD >
8
9 return LCI_OK ;
10 }
Listing 1: Code template for the output calculation.
5.3 Post-processing
Within the post-processing, different tasks are exe-
cuted depending on the configuration of the code gen-
erator. Here e.g. still another optimization on code
level or the production of a separate documentation
and the compilation of the program are possible. As
a result, an LCI package is created and saved persis-
tently. It can be embedded again in an Xcos model for
SiL simulations, for example, or in a real-time envi-
ronment for HiL simulations.
6 CASE STUDY
Various tests were successfully carried out to verify
the LoRra code generator. In the context of this paper,
the functionality is demonstrated by the case study
of a speed controlled DC motor. Here, a PI con-
troller according to Eq. (6) with anti-windup structure
is used to control the speed of the traction motor for
an autonomous guided vehicle. Figure 6 illustrates
the model of this function in the Xcos environment.
G(s) = K
R
T
R
s + 1
s
(6)
MODELSWARD 2022 - 10th International Conference on Model-Driven Engineering and Software Development
298
For real-time testing, the interfaces of the model
are linked to the interfaces of the target hardware
via the LoRra-RTI. Hereby, the encoder, PWM out-
put and digital output interfaces are operated. An
STM32H7 microcontroller with a Cortex Microcon-
troller Software Interface Standard (CMSIS) compat-
ible real-time operating system is used for the real-
time simulation.
The result of automatic code generation and
implementation into the real-time environment
is demonstrated by listing 2. Scheduling is
performed by the FreeRTOS operating system.
First, the model is initialized, using the LCI-
interface Function PI_Controller_init. Within
an infinite loop, the reading / writing of hard-
ware interfaces (PI_Controller_readInputs
/ PI_Controller_writeOutputs), the cal-
culation of block outputs / state derivations
(PI_Controller_calcOutputs) as well as the
integration (PI_Controller_callIntegrator)
are performed in predefined order. As integration
method, the explicit Euler method is used here.
Also, the measuring of the task turnaround time is
performed by the RTI (rti_ttTimer_start and
rti_ttTimer_stop).
1 // initialize the PI_Controller
function
2 P I_Con t r o l l er_in i t () ;
3 r t i_tickCo u n t = o s K e rnel G e t T i ckCo u n t
() ;
4
5 /
*
Infinite loop
*
/
6 for( ;;)
7 {
8 // query memory status and protect
memory
9 if( r t i _ l o c k_mem (0 U ) == os O K ) {
10 rt i _ t t T imer_ s t a r t () ;
11
12 // read hardware inputs
13 P I _ C o ntro l l e r _rea d I n p uts () ;
14 // calculate the outputs
15 P I _ C o ntro l l e r _ca l c O u tput s (1 U ) ;
16 // calculate the state
derivations
17 P I _ C o ntr o l l e r_c a l c D eri v a t i ons (1 U
) ;
18 // call the integration method
19 P I _ C o ntr o l l e r_c a l l I nte g r a t or (
rt i _ t i c k C o unt );
20 // write hardware outputs
21 P I _ C o ntro l l e r_wr i t e O utp u t s () ;
22
23 rt i _ t t T i mer_s t o p () ;
24 // release the memory protection
25 rt i _ u n l o c k_mem () ;
26 // if xcp is enabled
27 #if ( L O R R A _ RTI_E n a _ X C P )
28 // run the XCP Event for RCP
29 xcp_evt ( x c p _rcp_ev t ,
xc p _ g e t _daq_t i m e () ) ;
30 #endif
31 }
32 else
33 rti_error ( S3 , " RTI Task : M e m o r y
locked ! ") ;
34
35 /
*
turn Task to the blocking state
until the next sample
*
/
36 r t i_tickCo u n t += TS_Ms ;
37 o s D elayUntil ( r t i _ t i ckCount ) ;
38 }
Listing 2: Result of automatic code generation and
implementation.
Figure 7 compares the results of the online
simulation (measurement) with the results of the
MiL simulation (simulation) for a step response to
n
des
= 100 1/s. The curves shown in the upper part
agree with high accuracy. This is illustrated by the de-
viation between both curves plotted in the lower part.
The occurring deviations result from the measurement
noise and the operating principle of the speed mea-
surement by means of an encoder. The automatically
generated code therefore implements the model be-
havior very well.
7 CONCLUSIONS AND
OUTLOOK
This paper presented the LoRra code generator, based
on open source software for model based design. Us-
ing the seamless model-based RCP development pro-
cess for the functional development of embedded sys-
tems, the general structure of the low-cost develop-
ment platform LoRra was presented, first. It uses the
open-source CAE tool Scilab / Xcos as a central sim-
ulation tool. Through the state of knowledge and the
analysis of available code generators, it was outlined
that currently no model-to-text transformation exists,
that is suitable for use in a low-cost RCP tool chain
and that is not limited to predefined applications. As
a solution, the concept of the LoRra code generator,
which transforms Xcos models into flexibly usable C
code with standardized interfaces, was presented and
realized. A basic verification of the results was car-
ried out using the speed control of a DC motor in a
real-time simulation as a case study.
Future work will focus on further verification and
analysis of the generated code. The evaluation of var-
ious metrics and the comparison with other code gen-
erators are the focus here. In addition, an extension
Automatic Code Generation for a Seamless Low-cost Development Platform
299
Figure 6: Functional model of the case study PI controller in Xcos.
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Figure 7: Measured and simulated step response of the PI
controlled DC Motor.
of the functional scope is being pushed so that a high
number of Xcos blocks is supported.
ACKNOWLEDGEMENTS
Funded by the Lower Saxony Ministry of Science
and Culture under grant number ZN3495 within the
Lower Saxony ”Vorab” of the Volkswagen Founda-
tion and supported by the Center for Digital Innova-
tions (ZDIN).
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