the send buffer, which does not include actual
transmission at the Ethernet level. The average
processing time for requests at the client reflects the
actual processing time and it shows how the server
performs with an increased load.
7 CONCLUSION
We described the design and implementation of a
novel stateless 64-bit multi-core Web server that runs
on a bare machine. One core handles networking
while other cores process the HTTP requests. The
server communicates with bare machine clients using
a simple UDP-based protocol that is easy to
implement. We also gave a brief overview of the
client design.
A key aspect of the protocol is the use of a 16-byte
data control header with fields specifically designed
to simplify client-server communication. The server
architecture avoids concurrency controls by using
buffers at the receiving and sending ends. The receive
circular list did not affect the results. The send
circular list showed a varying number of packets
(maximum of 24) waiting to be sent depending on the
server load. The measured concurrency in the system
shows reasonable parallelism (maximum of 16). The
use of a dedicated core for networking enables
multiple cores to be used efficiently to implement the
Web server application.
We identified the single network interface card as
the main bottleneck in processing requests in multi-
core processors. The performance measurements
indicate that there is no linear speedup gained by
using multiple cores for processing because the
network interface is the bottleneck. Future studies
could investigate the use of multiple on-board NIC
interfaces or chips for multi-core processors.
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