2 SAMPLING PRINCIPLE OF
SAMPLING OSCILLOSCOPE
An oscilloscope is an electronic instrument that
converts electrical signals, primarily voltage, into
visible traces on a display screen. In other words, an
oscilloscope can convert electrical signals into optical
signals and dynamically plot the electrical signals in
a two-dimensional form over time. The voltage is
plotted on the vertical axis of the oscilloscope display
screen, while the time is plotted on the horizontal axis.
The plotted voltage and time are ultimately displayed
as a graph of the input signal, often referred to as a
"waveform". As the characteristics of the input signal
change, the displayed waveform on the oscilloscope
screen is continuously updated.
The bandwidth range of a sampling oscilloscope
is much wider than that of a real-time oscilloscope,
meaning it can measure signals with a broader
bandwidth range. Due to the high frequency of the
input signal, the oscilloscope does not directly display
the measured signal. Instead, it uses a frequency-
conversion method to sample the signal at different
positions in the waveform of the measured signal,
using a time much shorter than the period of the
measured signal. The sampling is performed
sequentially in a stepped order for each waveform of
the signal (Wang Shibiao).
PRBS
1 2 3
Re-arm time
15bit
Trigger point
Sampling point
Sequential delay
Reconstructed
waveform
Pattern
trigger
Fig. 1. Schematic diagram of sampling principle of
sampling oscilloscope-
Taking PRBS code as an example, Fig 1 illustrates
the sampling principle of a sampling oscilloscope. A
trigger point is provided by a pattern trigger from the
clock signal, and sampling is performed after the
trigger. After each pattern trigger, new sampling is
carried out at sampling points slightly away from the
pattern trigger point and repeated. Then, the sampled
oscilloscope reconstructs the waveform. This paper
focuses on studying the jitter of sampling
oscilloscopes, and the oscilloscopes mentioned
following the paper refer to digital sampling
oscilloscopes unless otherwise specified.
3 SAMPLE CLOCK JITTER
The sampling clock is an essential part of ADC. The
sampling oscilloscope through the ADC to sample the
input signal, and then converting each sample point
of the analog signal into a digital value. The sampling
clock controls when the ADC performs the sampling.
In other words, the frequency of the sampling clock
determines the time interval of the oscilloscope.
However, the clock signal generated by the sampling
clock itself exhibits a certain jitter, which is referred
to as clock jitter. Clock jitter is an inherent
characteristic that cannot be completely eliminated (S.
Huang) and is one of the main sources of the
oscilloscope jitter measurement floor.
Clock jitter can be classified into random jitter and
deterministic jitter. Random jitter is caused by
thermal noise, flicker noise, and shot noise, which are
related to the electronic and hole characteristics of
electronic and semiconductor devices. The sources of
deterministic jitter are switching power supply noise,
crosstalk, and electromagnetic interference, etc.,
which are related to circuit design (LI Liping, Zhang
Changjun).
Clock jitter can be represented in various ways
(Zhu Jiangmiao), such as Period jitter (PEJ), Cycle to
Cycle jitter (C2C), and Timing Error (TE). In this
paper, TE is used to represent clock jitter, which
refers to the deviation between the actual edge of the
clock and the ideal edge. Fig 2 gives the schematic
diagram of TE.
Fig. 2. Schematic diagram of TE in clock jitter.
Due to the high sampling clock frequencies of
modern high-bandwidth oscilloscopes, which can
reach up to 160G/s or higher, the time interval
between samples is very small. Therefore, ensuring
that each actual sample point falls at the ideal position
is challenging. In other words, the existence of clock
jitter causes the sampled amplitude of the signal to not
correspond exactly to its actual sampling time,
thereby affecting the measurement results of the
oscilloscope. Since clock jitter includes both
deterministic jitter and random jitter, averaging
multiple waveforms can effectively remove the
random jitter in clock jitter, reducing the magnitude
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