Integrating SysML and Timed Reo for Modeling Interactions in

Cyber-Physical Systems Components

Perla Tannoury and Ahmed Hammad

FEMTO-ST Institute, CNRS, University of Bourgogne Franche-Comt

e, Besanc¸on, France

Keywords:

CPS, Speciﬁcations, Structural Modeling, SysML, Timed Reo, Timed SysReo.

Abstract:

Modeling Cyber-Physical Systems (CPS) with timing constraints remains a challenge due to the complex be-

haviors of their interconnected components that operate in a physical environment. In this paper, we introduce

“Timed SysReo”, a novel incremental design methodology that integrates SysML and Timed Reo for modeling

CPS architectures and timed interaction protocols during the design phase. We ﬁrst deﬁne the meta-models to

formalize CPS model architecture and to detail timed connections between its components. Then, we propose

to precise the meta-model with Object Constraint Language (OCL), that imposes rules to be respected in order

to ensure consistency between timed models in our incremental design approach. Finally, we demonstrate our

approach through an example of the Smart Medical Bed (SMB) system.

1 INTRODUCTION

Cyber-Physical Systems (CPSs) consist of both soft-

ware and physical elements that interact continuously

with each other (Kim and Kumar, 2012). They are

used in diverse domains such as healthcare, smart

cities, and autonomous vehicles (Tartarisco et al.,

2024; Barroso et al., 2023).

Efﬁcient CPS modeling is crucial for verifying

functionality before implementation, especially in

critical domains. However, incorporating timing con-

straints adds complexity and risks. Errors in these

models can be particularly risky in sectors like emer-

gency response and medical applications.

Various languages are used in CPS modeling

(Mallet, 2015; Bouskela et al., 2022; Genius and

Apvrille, 2023). We chose SysML (Hause et al.,

2006) for its ability to model heterogeneous sys-

tems, which is widely employed in industrial applica-

tions. However, CPS components interact with tim-

ing constraints, leading to complex behaviors. While

SysML enhances stakeholder understanding through

its graphical representation, it may not fully capture

and verify these intricate timed interactions.

Timed Reo (Arbab et al., 2007), an extension of

Reo (Arbab, 2004), is crucial for managing complex

system protocols, especially in CPS where timing is

critical. It enables precise determination of data ﬂow

timing between component ports, ensuring compli-

ance with essential timing constraints. This simpli-

ﬁes system design, aids validation, and ensures inter-

operability within speciﬁed time frames, addressing

SysML’s limitations. Timed Reo also offers a formal

representation of timed coordination among compo-

nents, facilitating system property analysis, and its

graphical representation enhances usability. How-

ever, its complexity and limited adoption compared

to SysML may pose challenges for stakeholders in un-

derstanding its implementation.

To date, there is no comprehensive study integrat-

ing SysML and Timed Reo in CPS modeling. Previ-

ous research has mainly focused on SysML (Huang

et al., 2018; Xie et al., 2021) or Timed Reo (Arbab

et al., 2007; Kokash et al., 2013) separately. Re-

cently in (Tannoury, 2022; Tannoury et al., 2022;

Tannoury et al., 2023), “SysReo”, a domain-speciﬁc

language (DSL) combining SysML with Reo, was

introduced to enhance CPS validation and veriﬁca-

tion. While “SysReo” effectively models CPS re-

quirements, structure, and behavior, it struggles with

handling timing constraints.

In this paper, we introduce “Timed SysReo”, a

novel incremental design methodology that integrates

SysML and Timed Reo for modeling CPS architec-

tures and timed interaction protocols during the de-

sign phase. Our methodology involves decompos-

ing complex CPSs into manageable levels, initially

establishing an abstract model that is iteratively re-

ﬁned while ensuring consistency. Initially, an abstract

model is deﬁned and progressively reﬁned while en-

Tannoury, P. and Hammad, A.

Integrating SysML and Timed Reo for Modeling Interactions in Cyber-Physical Systems Components.

DOI: 10.5220/0012854100003753

Paper published under CC license (CC BY-NC-ND 4.0)

In Proceedings of the 19th International Conference on Software Technologies (ICSOFT 2024), pages 477-484

ISBN: 978-989-758-706-1; ISSN: 2184-2833

477

suring consistency throughout. The Timed SysReo

framework adopts the hierarchical structure diagram

from SysReo’s Extended SysML Block Deﬁnition

Diagram (ExtBDD) to represent the CPS structure.

Unlike SysReo, Timed SysReo focuses on model-

ing the internal structure and interaction protocols of

CPS components, accommodating timing constraints

which SysReo cannot handle. Our contribution intro-

duces the Timed Reo Internal Block Diagram (Timed

Reo IBD) to represent the internal structure and timed

interaction protocols of CPS components, enhancing

clarity, particularly in critical CPS scenarios requir-

ing precise timing. Timed SysReo comprises three

primary diagrams for CPS modeling: (1) the require-

ment diagram for capturing CPS needs, including

functional and non-functional requirements, (2) the

ExtBDD diagram for representing CPS hierarchical

structure, and (3) the Timed Reo IBD diagram for

modeling CPS inner architecture and timed interac-

tion protocols. In this work, we deﬁne the Timed Sys-

Reo language and present its meta-models. Addition-

ally, we establish OCL constraints on the Timed Reo

IBD model to enhance precision. Our methodology

aims to address challenges in designing medical CPSs

by systematically expressing timed interaction proto-

cols at each design level. Finally, we demonstrate our

approach through a Smart Medical Bed (SMB) exam-

ple.

The paper is organized as follows. Section 2 pro-

vides a brief overview of SysML, Timed Reo, and Ob-

ject Constraint Language (OCL). Section 3 describes

the proposed modeling approach using Timed Sys-

Reo models. Section 4 presents our example of the

SMB (Smart Medical Bed) system using Timed Sys-

Reo models. Finally, Section 5 concludes the paper

while brieﬂy discussing future work.

2 BACKGROUND

This section offers a succinct overview of SysML,

Timed Reo, and Object Constraint Language (OCL).

2.1 SysML in a Nutshell

The System Modeling Language (SysML) (Hause

et al., 2006) facilitates modeling heterogeneous com-

plex systems across diverse industries. It aligns the

input from different stakeholders to maintain consis-

tency and uphold superior design standards. Main-

tained by the Object Management Group (OMG)

(Delligatti, 2013), SysML comprises nine diagram

types used to model the requirement, structure, and

behavior of CPS. In the context of Smart Medical Bed

(SMB) system modeling, our focus lies on require-

ment, block deﬁnition, and internal-block diagrams.

Below, we outline the SysML concepts relevant to

these diagrams, essential for modeling the SMB sys-

tem effectively.

The Requirement Diagram (RD): delineates the

system requirements anticipated by users. It illus-

trates the relationship between requirements and other

model elements that either “satisfy” or “verify” them.

This diagram provides a modeling framework for

text-based requirements.

The Block Deﬁnition Diagram (BDD): is a struc-

tural diagram that visually represents system compo-

nents using blocks. It depicts relationships between

these blocks and their hierarchical structure. Two

types of blocks are distinguished: Atomic and com-

posite blocks. Each block comprises a name, val-

ues, properties, referenced blocks, components, op-

erations, and constraints. Ports located on the sides

facilitate communication with the system. Blocks

can represent tangible or conceptual entities like hard-

ware, software, physical objects, and abstract entities.

The Internal Block Diagram (IBD): is a structural

diagram that represents the static state of the system.

It comprises sub-blocks detailing the internal arrange-

ment of the system. These sub-blocks interact via

properties, parts, connectors, ports, and interfaces, fa-

cilitating various interactions such as state transitions,

software operations, input/output ﬂows, and continu-

ous interactions.

2.2 Timed Reo

Before Timed Reo, Reo (Arbab, 2004) served as a

channel-based coordination language for concurrent

and distributed systems. Reo constructs complex con-

nectors using basic channels to regulate communica-

tion in CPS, with these connectors being exogenous

and combinable. Constraint Automata (CA) (Baier

et al., 2006) formally represent and analyze Reo, cap-

turing behavior and data ﬂow.

Timed Reo expands upon Reo by introducing

channels with timing constraints, which include timed

channels for timeouts and delays (Arbab et al., 2004;

Arbab et al., 2007). Its primary aim is to spec-

ify exogenous protocols governing timed interactions

among components in concurrent applications. Ad-

ditionally, Timed Reo’s formal semantics are cap-

tured by Timed Constraint Automata (TCA), extend-

ing Constraint Automata (CA) to describe behavior

incorporating timing constraints. TCA feature two

types of transitions: internal changes of locations

driven by time constraints and transitions represent-

ing synchronized input/output operations at ports.

ICSOFT 2024 - 19th International Conference on Software Technologies

478

Deﬁnition of TCA: A TCA A = (L, L

, N, →, C, ic)

is composed of:

• L: set of locations (or states).

• L

: initial location where L

∈ L.

• N: set of port names.

• →: transition relation →⊆ L × 2

× DC ×CC ×

× L, where DC is the set of Data Constraints

(DC) over a ﬁnite data domain. DC is a condition

that must be met for data to be exchanged between

two components. For example, DC can be used

to implement a ﬁlter pattern that only allows cer-

tain types of data to be exchanged, or they can be

used to implement a synchronization pattern that

ensures that two components exchange data in a

speciﬁc order. CC is a clock constraint.

• C: set of clocks.

• ic : L → CC is a function that assigns to any loca-

tion L an invariance condition ic(L).

2.3 OCL

The Object Constraint Language (OCL) (Cabot and

Gogolla, 2012) serves as a general-purpose formal

language enhancing UML and SysML models. Its

main purpose is to precisely specify constraints, ﬁll-

ing a gap where graphical notations may lack clarity

and conciseness.

3 MODELING APPROACH USING

TIMED SYSREO

In this section, we outline our model-based design

methodology. First, we detail the incremental CPS

design process using Timed SysReo. Then, we deﬁne

and reﬁne the meta-models employed in this process

using OCL.

3.1 Approach Steps

We outline our modeling approach in Figure 1. Ini-

tially, the modeler speciﬁes a Requirement Diagram

(RD) to analyze and organize CPS requirements. The

subsequent phase focuses on deﬁning CPS architec-

ture, wherein system components are delineated as

blocks using ExtBDD. In the third phase, an incre-

mental approach is employed, starting with an ab-

stract speciﬁcation of the global internal system using

Timed Reo IBD. This speciﬁcation evolves gradually

by selecting components that adhere to constraints de-

ﬁned in the abstract speciﬁcation. Notably, Timed

Reo IBD can incorporate timing constraints critical

for modeling CPS. Failure to model timing accurately

in CPS can result in life-threatening situations such

as medication errors, vehicle accidents, aviation inci-

dents, and industrial disasters. The fourth phase in-

volves linking the requirement diagram to ExtBDD

and Timed Reo IBD. Finally, our OCL rules are ap-

plied to ExtBDD and Timed Reo IBD to reﬁne and

specify the abstract diagrams, ensuring consistency in

Timed SysReo models.

Requirements Diagram

Timed SysReo

Extended Block Definition

Diagrams (ExtBDD)

Timed Reo Internal Block

Diagram (Timed Reo IBD)

OCL

Link

(requirement/model)

Link

(requirement/model)

Figure 1: Modeling approach based on Timed SysReo.

3.2 Timed SysReo Meta-Models

In Figure 2, we represent the process of transform-

ing the SysML Block Deﬁnition Diagram (BDD)

and Internal Block Diagram (IBD) into Timed Sys-

Reo Extended Block Deﬁnition Diagram (ExtBDD)

and Timed Reo Internal Block Diagram (Timed Reo

IBD), respectively. The transformation consists of

two parts:

1. The transformation of SysML Block Deﬁnition

Diagram (BDD) into Timed SysReo Extended

Block Deﬁnition Diagram (ExtBDD) involves us-

ing SysML BDD meta-models and splitting the

CPS hierarchy into two levels. The ﬁrst level

represents the abstract model of CPS, with pri-

mary components as main blocks, and the sec-

ond level depicts concrete components as sub-

blocks. ExtBDD provides a more detailed view

of the system structure compared to traditional

SysML BDD, aiding in managing system com-

plexity and ensuring design alignment with re-

quirements. Additionally, ExtBDD meta-model

comprises blocks containing proxy ports and in-

ternal operations, facilitating the translation of op-

erations into functions representing system behav-

ior.

2. The conversion of SysML Internal Block Diagram

(IBD) into Timed Reo Internal Block Diagram

(Timed Reo IBD) entails employing SysML IBD

meta-models and replacing IBD connectors with

“Timed connectors”. These Timed connectors en-

able explicit representation of component inter-

Integrating SysML and Timed Reo for Modeling Interactions in Cyber-Physical Systems Components

479

IBD

Connectors

source

target

Parts

1..*

P in

P out

1..*

2..*

Ports

operations

ProxyPort interface

P in P out

BDD

1..*

0..*

Block

operations

0..*

1 1

1..*

subblock

int

SysML BDD SysML IBD

operations

ProxyPort

interface

P in P out

ExtBDD

1..*

0..*

2 .. *

int

operations

Main

Block(s)

1) Abstract Level

operations

ProxyPort

interface

P in P out

ExtBDD

0..*

0..* 0..*

2 .. *

int

operations

SubBlock(s)

2) Concrete Level

SysML BDD

ExtBDD

A-1)

A-2)

SysML IBD

Timed Reo IBD

B-1)

B-2)

1) Transformation of SysML BDD into

ExtBDD

2) Transformation of SysML IBD into

Timed Reo IBD

Timed Reo Connectors

source

target

1 1

Parts

1..*

P in P out

1..* 2..*

Ports

Timed Reo IBD

Node In

Node Out

Nodes

Channels

FIFO

Clock

0..1

1..*

syncDrain

sync

Figure 2: From SysML diagrams to Timed SysReo diagrams.

nal composition and timed interaction protocols,

thereby enhancing system reliability, safety, and

performance. Moreover, Timed Reo connectors

possess formal semantics, ensuring precision and

veriﬁability through formal methods, which ulti-

mately improves reliability and reduces develop-

ment time and costs. The Timed Reo IBD meta-

model, extending from ExtBDD, aims to repre-

sent the internal structure of CPS components and

their timed connections across various parts of the

system. It encompasses components such as Parts,

Ports, and Timed Reo connectors. These con-

nectors offer a range of functionalities to control

data ﬂow effectively. For instance, the Sync chan-

nel promptly transfers data from input to output,

while FIFO temporarily stores data before trans-

mitting it. SyncDrain, on the other hand, receives

data from two sources simultaneously, discarding

it thereafter. The Filter channel selectively for-

wards data only when speciﬁc conditions are met.

Additionally, Timed Reo connectors feature nodes

facilitating data exchange between system com-

ponents. They also incorporate clocks to moni-

tor time intervals, enabling the system to manage

timeouts or delays efﬁciently.

In summary, “Timed SysReo” offers a more com-

prehensive and adaptable approach to system design,

which results in more effective and reliable CPS. The

use of ExtBDD provides a more precise and detailed

hierarchical view of the system, while Timed Reo

IBD allows for explicit modeling of the internal com-

position of the system and the timed interaction pro-

tocols among its components.

3.3 OCL on Timed SysReo

Meta-Models

To formalize constraints on Timed SysReo meta-

models, we used predeﬁned OCL rules to precise the

latter. These rules should be respected by CPS de-

signers in order to insure consistency in Timed Sys-

Reo models.

The OCL constraints for ExtBDD meta-model

(see Figure 2A-2) in Table 1 ensure the integrity of its

structure. The ﬁrst constraint mandates that every op-

eration within a Block must also exist in its subblocks,

maintaining consistency across levels of detail. The

second constraint requires each Block to have at least

two Proxy Ports, ensuring input and output function-

ality. These constraints guarantee the reliability and

completeness of the model.

The OCL constraints for Timed Reo IBD meta-

model (see Figure 2B-2) in Table 2 ensure the com-

pleteness and consistency of the model. The ﬁrst con-

straint is used to differentiate parts by names. The

second one mandates that each Part must have at least

one input and one output Port, essential for data ex-

change. Lastly, the third constraint speciﬁes that a

ICSOFT 2024 - 19th International Conference on Software Technologies

480

Table 1: OCL Well-formedness constraints of ExtBDD.

Description OCL Constraints

1) Operation

within a Block

must be present

in the set of op-

erations of its

subblocks.

context Block inv:

self.pp.int.op->

forAll (p:op implies p

in self.subblock.pp.

int.op)

2) Block should

contain a mini-

mum of two Proxy

Ports, encompass-

ing both input and

output functionali-

ties.

context Block inv :

Block.proxyport.pin->

size()≥ 1 and

Block.proxyport.pout->

size()≥ 1

Timed Reo connector can have either one clock or

none, ensuring consistent timing behavior. These con-

straints collectively maintain the accuracy and relia-

bility of the Timed Reo IBD model.

Table 2: OCL Well-formedness constraints of Timed Reo

IBD.

Description OCL Constraints

1) Part needs to

be distinguishable

from other blocks

by name

context Parts inv :

Parts.AllInstances()

->forAll (p1, p2 | p1

<> p2 implies p1.name

<> p2.name)

2) Parts must have

at least two ex-

ternal Ports (input,

output)

context Parts inv:

Parts.Ports.pin->size()

≥ 1 and

Parts.Ports.pout->

size() ≥ 1

3) Timed Reo con-

nector can have

only one clock or

none

context

TimedReoConnector inv:

TimedReoConnector

.clock->size() = 0

or TimedReoConnector

.clock->size() = 1

4 SMART MEDICAL BED (SMB)

EXAMPLE

In this section, we present our example of the Smart

Medical Bed (SMB) system. First, we begin by

brieﬂy introducing the SMB system. Subsequently,

we collect information about the SMB system and an-

alyze it using our Timed SysReo models. This pro-

cess involves specifying the system’s requirements,

designing its structure, internal composition and inter-

action protocol while considering timing constraints.

4.1 SMB Overview

The Smart Medical Bed (SMB) integrates various

sensors to monitor patient vital signs, with a focus on

temperature sensing. Data from the temperature sen-

sor is transmitted to a Remote Terminal Unit (RTU)

within a latency period of 1 Time Unit (TU). The RTU

facilitates seamless data communication between the

Smart Bed (SB) and the Nursing Station (NS), ana-

lyzing data and promptly alerting healthcare staff if

abnormalities are detected, all within a latency period

not exceeding 3 TUs. The SMB system consists of

three main components: SB, RTU, and NS, each play-

ing a vital role in patient monitoring and communica-

tion.

Our study focuses on modeling and validating

the requirements, structure, and timed interaction

protocol of the SB and RTU within the SMB sys-

tem. Leveraging the Timed SysReo model-driven ap-

proach, we analyze system requirements and architect

the system while considering timing constraints.

Remote Terminal Unit

(RTU)

SMART BED

(SB)

Heart rate

Blood pressure

Temperature

Cough

Nursing Station

(NS)

Healthcare Team

Monitoring System

t1<=1

t2<=3

Figure 3: Smart medical bed architecture.

4.2 Modeling SMB with Timed SysReo

4.2.1 Requirements

During the modeling process, ensuring system func-

tionality and usability is paramount. The initial step

involves identifying speciﬁc system needs outlined in

the requirement diagram in Figure 4, which models

the SMB system’s functional requirements to ensure

smooth operation and user satisfaction.

For instance, requirement R1 underscores the

need for the SMB system to collect temperature data

Integrating SysML and Timed Reo for Modeling Interactions in Cyber-Physical Systems Components

481

from sensors within the Smart Bed and monitor pa-

tient vital signs to promptly respond to abnormalities.

This requirement is reﬁned by R2 and R3. R2 man-

dates that the Smart Bed (SB) must transmit temper-

ature data to the Remote Terminal Unit (RTU) within

a maximum latency of 1 Time Unit (TU), satisﬁed by

the SB block. R3 highlights the RTU’s role in ana-

lyzing temperature data and taking prompt action, re-

quiring data processing within 3 TUs, either updating

patient info or alerting the healthcare team, satisﬁed

by the RTU block.

<<requirement>>

Data Collection and

Monitoring

ID ="R1."

Text = "The SMB

system shall collect

temperature data from

Smart Bed sensors and

monitor patient vitals for

timely intervention."

<<requirement>>

Data Transmission

ID ="R2"

Text = "The SB

shall transmit

temperature data to

the RTU within 1

TU latency."

<<refine>>

<<Block>>

<<satisfy>>

<<refine>>

<<requirement>>

data Transmission

ID ="R2.1"

Text = "The

temperature

sensor shall

transmit collected

data to the

gateway."

<<requirement>>

Gateway Transmission

ID ="R2.2"

Text = "The gateway

shall send

temperature data to

the MDB within 1 TU

latency."

<<Block>>

<<satisfy>>

<<Block>>

Gateway

<<satisfy>>

<<requirement>>

Decision Making

ID ="R3"

Text = "The RTU

shall analyze

temperature data

then update patient

info or alert the

healthcare team

within 3 TU."

<<requirement>>

MDB Analysis

ID ="R3.1"

Text = "The MDB

shall analyze data

then update patient

info or alert

healthcare teams

within 3 TU."

<<Block>>

MDB

<<satisfy>>

<<requirement>>

Emergency

Alerts

ID ="R3.1.1"

Text = "The PA

shall receive the

emergency alert

message from

the MDB."

<<Block>>

<<satisfy>>

<<requirement>>

Update Patient

Info

ID ="R3.1.2"

Text = "The PU

shall receive the

update patient

info message

from the MDB."

<<Block>>

<<satisfy>>

<<refine>>

<<Block>>

RTU

<<satisfy>>

<<TimedReoIBD>>

sendTempData()

<<validate>>

<<TimedReoIBD>>

analyzedData()

<<validate>>

<<TimedReoIBD>>

updatePatientInfo()

<<validate>>

<<TimedReoIBD>>

emergencyAlerts()

<<validate>>

<<refine>>

Figure 4: The requirement diagram of the SMB system.

4.2.2 ExtBDD

The ExtBDD diagram illustrates the hierarchical

structure of the SMB system, with each component

from the requirement diagram (Figure 4) represented

as a block. These blocks detail a component’s inter-

nal operations as private operations and its required

and offered services. Each block includes two proxy

ports: an input port for available services and an out-

put port for required services.

In Figure 5 [A], the abstract overview of the sys-

tem is depicted, emphasizing main components such

as “SMB”, subdivided into Smart Bed (SB) and Re-

mote Terminal Unit (RTU), connected via composi-

tion.

Figure 5 [B] illustrates the concrete level of the

SMB system, showcasing sub-components within pri-

mary components. For example, the smart bed com-

ponent includes “Temperature Sensor” and “Gate-

way” blocks, with the former responsible for contin-

uous data measurement, recording, and transmission

to the Gateway.

4.2.3 Timed Reo IBD

In Figure 6, we compare the traditional internal block

diagram of SysML with the Timed Reo IBD of Timed

SysReo. The conversion from SysML IBD (Fig-

ure 6 [B-1]) to Timed Reo IBD (Figure 6 [B-2]) in-

volves replacing SysML IBD connectors with “Timed

Reo connectors”, allowing for a more explicit repre-

sentation of component internal composition and in-

teraction protocols, including data and timing con-

straints.

SysML IBD connectors establish connections be-

tween compatible ends without managing connected

entities, leading to “endogenous” coordination that

complicates design, reduces reusability, and increases

complexity, constraints, and project costs in CPS

modeling. In contrast, Timed Reo IBD integrates co-

ordination logic into connectors, enhancing reusabil-

ity and simplifying component design, commonly

used for model coordination in complex systems.

Timed Reo IBD provides a stakeholder-friendly

diagram for visualizing CPS components and their

timed interactions. It enhances reusability by combin-

ing simpler circuits at boundary nodes, easing the cre-

ation of complex circuits. Additionally, Timed Reo

IBD offers an explicit means of expressing systems

via Timed Constraint Automata (TCA) (Arbab et al.,

2007), aiding accurate delineation and examination.

Timed Reo IBD enable CPS designers to precisely

capture exogenous communication and synchroniza-

tion patterns among components, enhancing system

reliability, safety, and performance while potentially

detecting errors early during development, thus sav-

ing time and costs.

In Figure 6[B](b,c), we illustrate the internal

structure of the SB and RTU components, along with

their timed interaction protocols. For instance, the

gateway (gtw) component transmits the “sendTem-

pData()” message to the medical database (MDB)

component at @t1 <=1 TU. Subsequently, the MDB

component analyzes the data at @t2<= 3 TU and for-

wards the analyzed data to the xrouter component.

Depending on the temperature status, the xrouter

component decides whether to send an “emergen-

cyAlerts()” message to the Patient Alert (PA) compo-

nent or an “updatePatientInfo()” message to the Pa-

tient Update (PU) component. Thus, the Timed Reo

IBD serves as a robust tool for modeling and an-

alyzing systems, showcasing how Timed Reo con-

nectors elucidate communication and coordination

ICSOFT 2024 - 19th International Conference on Software Technologies

482

<<System>>

SMB system

attributes

+ <<ProxyPort>>

+ prtu_out:loutRTU

+ <<ProxyPort>>

+ prtu_in:linRTU

1..*

<<IntBlock>>

linSB

operations

+ tempDataIn()

<<Block>>

RTU

operations

<<IntBlock>>

linRTU

+ sendTempData()

+ analyzeData()

<<IntBlock>>

loutSB

operations

+ tempDataOut()

+ sendTempData()

<<Block>>

Smart Bed (SB)

attributes

+ <<ProxyPort>>

+ psb_out:loutSB

+ <<ProxyPort>>

+ psb_in:linSB

<<IntBlock>>

linG

operations

+ tempDataOut()

<<IntBlock>>

linG

operations

+sendTempData()

1 1

<<Block>>

Smart Bed (SB)

attributes

+<<ProxyPort>>

+psb_out:loutTS

+ <<ProxyPort>>

+ psb_in:linTS

<<IntBlock>>

loutTS

operations

+ tempDataOut()

<<IntBlock>>

linTS

operations

+ tempDataIn()

<<IntBlock>>

linPA

operations

+ emergencyAlerts()

<<Block>>

RTU

attributes

+<<ProxyPort>>

+psb_out:loutRTU

+ <<ProxyPort>>

+ psb_in:linRTU

<<IntBlock>>

loutMDB

operations

+analyzeData()

<<IntBlock>>

linMDB

operations

+sendTempData()

<<Block>>

Patient Update

attributes

+<<ProxyPort>>

+pg_out:loutPU

+<<ProxyPort>>

+pg_in:linPU

<<Block>>

MDB

attributes

+<<ProxyPort>>

+ps_out:loutMDB

+<<ProxyPort>>

+ps_in:linMDB

<<IntBlock>>

linPU

operations

+ updatePatientInfo()

Level 2 - Concrete SMB ExtBDD Model

[B]

<<IntBlock>>

loutRTU

operations

+ emergencyAlerts()

+ updatePatientInfo()

Level 1 - Abstract SMB ExtBDD Model

[A]

<<Block>>

Temp Sensor(TS)

attributes

+<<ProxyPort>>

+ps_out:loutTS

+<<ProxyPort>>

+ps_in:linTS

<<Block>>

Gateway

attributes

+<<ProxyPort>>

+pg_out:loutG

+<<ProxyPort>>

+pg_in:linG

<<Block>>

Patient Alerts

attributes

+<<ProxyPort>>

+pg_out:loutPA

+<<ProxyPort>>

+pg_in:linPA

Figure 5: The ExtBDD model of the SMB system.

Timed Reo IBD SMB

Timed Reo IBD RTU

+prtu_out

(b) Timed Reo IBD of SB

Timed Reo IBD SB

+ psb_in

+ ts:

+ psb_out

+ gtw:

Gateway

temp

DataIn()

temp

DataOut()

sendTempData()

(a) Timed Reo IBD of SMB

+psb_in

+sb:

+rtu:

RTU

sendTemp

Data()

+ prtu_in

+ mdb:

MDB

analyzeData()

+ pa:

+ pu:

emergencyAlerts()

updatePatientInfo()

+prtu_out

temp

DataIn()

emergencyAlerts()

update

PatientInfo()

t2<=3

t1<=1

IBD SMB

IBD RTU

+prtu_out

(b) IBD of SB

IBD SB

+ psb_in

+ ts:

+ psb_out

+ gtw:

Gateway

temp

DataIn()

temp

DataOut()

sendTempData()

(a) IBD of SMB

+psb_in

+sb:

+rtu:

RTU

sendTemp

Data()

+ prtu_in

+ mdb:MDB

analyzeData()

+ pa:

+ pu:

emergencyAlerts()

updatePatientInfo()

+prtu_out

temp

DataIn()

emergencyAlerts()

update

PatientInfo()

> >

> > > >

> > >

> >

[A] Traditional IBD of SysML

[B] Extending IBD with Timed Reo: Timed Reo IBD

Figure 6: Comparison between a traditional SysML IBD and a Timed Reo IBD for the SMB system.

among components, resulting in a comprehensive rep-

resentation of the system’s structure and behavior.

Another notable aspect of Timed Reo IBD is its

capability to validate predeﬁned requirements, as de-

picted in Figure 4. For instance, the “R2.2” require-

ment is validated using a timed FIFO channel, co-

ordinating the “sendTempData()” message from the

gateway (GTW) component to the MDB component

within a time constraint of t

≤ 1. Similarly, the

“R3.1” requirement is validated through a timed FIFO

channel, using the “analyzedData()” message that is

transmitted from the MDB component to the Exclu-

sive Router (EXR) within a time limit of t

≤ 3. Sub-

sequently, upon entering the EXR router, the system

dispatches either an “emergencyAlert()” message to

the PA component if the analyzed data deviates from

normal or an “updatePatientInfo()” message to the PU

component if the analyzed data is within normal pa-

rameters.

Integrating SysML and Timed Reo for Modeling Interactions in Cyber-Physical Systems Components

483

5 CONCLUSION AND FUTURE

WORK

In this paper, we proposed a novel incremental de-

sign approach exploiting Timed SysReo models that

combines SysML and Timed Reo notations in order

to enable a faithful modeling of CPS with timing con-

straints. Hence, we speciﬁed meta-models to deﬁne

Timed SysReo language to formalize CPS architec-

ture, and to detail timed connections between its com-

ponents. We proposed to precise the meta-model with

OCL, that imposes rules to be respected in order to

ensure consistency between Timed SysReo models

in our incremental design approach. Thanks to our

Timed SysReo models, CPS designers can model all

CPS facets and capture their timed complex coordina-

tion. Timed SysReo was illustrated by a Smart Med-

ical Bed (SMB) example that has demonstrated the

principal expressiveness and modeling conveniences.

As future work we plan to: (1) Verify and validate

temporal properties on Timed SysReo models. (2)

Check our Timed SysReo models against time re-

quirements and properties deﬁned in the modeling

steps using the UPPAAL (Bengtsson et al., 1996) tool.

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