Motion Control Unit Design for Control Prototyping
of Modern BLDC/PMSM Drives and Piezo Actuators
Kv
ˇ
etoslav Belda
1 a
, Pavel P
´
ı
ˇ
sa
1,2 b
and
ˇ
St
ˇ
ep
´
an Pressl
1,2 c
1
Department of Adaptive Systems, The Czech Academy of Sciences, Institute of Information Theory and Automation,
Pod Vod
´
arenskou v
ˇ
e
ˇ
z
´
ı 4, 182 00 Prague 8, Czech Republic
2
Department of Control Engineering, Czech Technical University in Prague, Faculty of Electrical Engineering,
Karlovo n
´
am
ˇ
est
´
ı 13, 120 00 Prague 2, Czech Republic
Keywords:
BLDC/PMSM Drives, Motion Control, Power Supply, Mechatronic Systems, PysimCoder, Real-Time
Generated Code, NuttX RTOS, Piezoelectric Bender Actuators, Rapid Prototyping.
Abstract:
This paper deals with the design and construction of an open-software and open-hardware motion control
unit intended for experimental development and rapid prototyping of advanced drive control for mechatronic
systems and robotic applications such as smart production lines, manipulators, and robotic machine tools.
The control unit is designed for high dynamic drives, both modern permanent magnet synchronous motors
and piezoelectric drives and actuators promising for the near future. The concept and construction of the con-
sidered control unit are presented both from the hardware and software point of view. This includes cus-
tom printed circuit boards, electronic components for communication and power outputs, the microcontroller,
firmware as well as software used to generate control application code. The presented experimental research
and development is illustrated by figures and records of measured data.
1 INTRODUCTION
Many motion controllers work in industrial and home
applications such as robots-manipulators, production
lines and machines, unmanned vehicles and oth-
ers. Therefore, the motion control matter is well
known among engineers and the amount of motion
controllers in industry is vast. On the market, the sup-
ply ranges from controllers working only with a spe-
cific actuator (motor) with closed firmware to more
affordable and available controllers.
However, in the early stages of developing or re-
searching new control algorithms, it can be advanta-
geous to have a generic prototyping platform. Thus,
for fast application development, controllers are re-
quired to enable rapid prototyping using model-based
design, capable of running the designed control al-
gorithms (Tachiquingutierrez et al., 2023). In this pa-
per, we propose a modular and extensible, yet rel-
atively low-cost, embedded platform with a strong
emphasis on running control applications built us-
ing model-based design tools that generate real-
time code. Firstly, we discuss the existing solutions
and then we introduce the main parameters of a pro-
posed control unit.
a
https://orcid.org/0000-0002-1299-7704
b
https://orcid.org/0000-0003-3476-5151
c
https://orcid.org/0009-0006-5364-8961
1.1 Existing Tools and Platforms
Let us analyse available solutions like ODrive
(ODrive Robotics, 2024), VESC (Vedder, 2022)
and SOLO (SOLO Motor Controllers SRL, 2024)
controllers that all focus on the control of Permanent
Magnet Synchronous Motors (PMSM) and Brush-
less Direct Current (BLDC) drives. These controllers
share a few similarities: i ) they use mostly the same
interfaces, such as UART, SPI, I
2
C, CAN, and USB;
however, for rapid prototyping, the Ethernet interface
can be useful for convenient data logging and config-
uration, even from all over the world; ii ) the other
similarity is that each controller features its API
to configure control algorithms; on our proposed plat-
form, we intend not to come with a custom API but
rather provide a nonrestrictive environment, where
the generated code of control algorithms could be run;
iii) the last similarity is the lack of more than three
phases per axis, making control of stepper motors
or other types of actuators not possible.
There are already several solutions avail-
able for Rapid Control Prototyping (RCP), such
as Speedgoat (Speedgoat GmbH, 2024) and dSPACE
(dSPACE GmbH, 2024). However, these systems
are expensive and are tightly linked up to MAT-
LAB/Simulink. In contrast, we propose a unit based
on an open and free code generation tool.
Belda, K., Píša, P. and Pressl, Š.
Motion Control Unit Design for Control Prototyping of Modern BLDC/PMSM Drives and Piezo Actuators.
DOI: 10.5220/0012999300003822
Paper published under CC license (CC BY-NC-ND 4.0)
In Proceedings of the 21st International Conference on Informatics in Control, Automation and Robotics (ICINCO 2024) - Volume 1, pages 579-590
ISBN: 978-989-758-717-7; ISSN: 2184-2809
Proceedings Copyright © 2024 by SCITEPRESS – Science and Technology Publications, Lda.
579

1.2 Proposed Platform
The platform is intended to be fully open-source
and open-hardware to remain maintained and tech-
nologically sustainable. A large number of commu-
nication interfaces are also required for communi-
cating with sensors, interfacing with the microcon-
troller and logging purposes, such as Ethernet, I
2
C,
SPI, USB, CAN, etc., as well as functional parts
such as Pulse Width Modulation, Analog-to-Digital
Converter and Timer peripherals for the specific de-
sign of field oriented control BLDC/PMSM drives.
The generated code adds computational overhead, so
a microcontroller with a powerful core is required.
The main focus is on the control of PMSM/BLDC,
Stepper (even with feedback sensors), and Brushed
DC motors. However, the platform can also be used
for special actuators e.g. using inverse piezoelectric
effect and others in mechatronics (Gao et al., 2020).
We require the controller to be able to drive
at least two stepper motors, therefore eight control-
lable phases are needed. Eight phases are also enough
for BLDC/PMSM motors with more than three
phases. With a higher number of phases, a utilised
motor can be still operated when one or more phases
are failed. For these advantages, the multi-phase
BLDC motor is taken a good candidate for energy
saving or military application (Moon et al., 2015).
The controller is intended as a generic prototyping
platform with a large number of interfaces, the size
and weight are not a matter. If the control algorithms
are designed and verified on this platform, the hard-
ware can be redesigned to fit certain criteria, such
as size, weight, safety-critical, or space compliance,
keeping the same algorithms. Despite all the pro-
posed features, we strive for an affordable solution
within motion controllers such as ODrive controllers.
Finally, to make the generated code portable
across various platforms, a Real-Time Operating
System (RTOS) is considered. It provides a run-
time environment for multithreaded applications, net-
work stacks and a unified API for accessing hard-
ware dependent peripherals. In this paper, NuttX
RTOS is selected as a suitable OS. Furthermore,
as an experimental but open source code genera-
tion tool, pysimCoder is used, capable of generating
NuttX-compatible code from block diagrams and re-
motely tuning its internal parameters over the network
via the Silicon Heaven protocol (Lenc et al., 2023).
The paper is organised as follows. Hardware
and its implementation are in Sections 2 and 3. Then,
the hardware adaptation to NuttX is described along-
side the pysimCoder suite in Section 4. Finally,
the pysimCoder applications are shown in Section 5.
2 HARDWARE SPECIFICATION
Hardware (HW) design is inspired by the LX-RoCon
controller (PiKRON, 2014). One of the design rules
is to divide the motion controller into a Micro-
Controller Unit (MCU) board and a Power stage
board as two printed circuit boards. The complete
motion control unit then comprises of these two con-
nected boards.
This design rule allows to swap the less complex
Power stage board for a different one while keep-
ing the more complex MCU board the same. Since
the MCU board accommodates most of the used
connectors, it is placed above the power board.
The power board acts as the 5 V voltage source
for the MCU board as well.
2.1 Hardware Analysis
To design and specify motion control unit, a basis
for selecting a micro-controller, the intended periph-
erals and their use cases were summarised as fol-
lows: TTL UART for Simple console user inter-
face; RS232, RS422 or RS485 for Communication
with other devices, sensor data acquisition; (Q)SPI
for Ext. SPI memory, sensor data acquisition; I
2
C
for Ext. I
2
C memory, sensor data acquisition; Counter
for position measurement from quadrature encoders;
JTAG or SWD for program flashing and debugging;
CAN for communication with other devices; Eth-
ernet for data logging, remote access, pysimCoder
parameter tuning; SD slot for data logging; PWMs
for Control of power switches; ADCs for current
measurement for motor field oriented control (FOC)
and GPIOs for reading from hall sensors.
The motion controller should be capable of driv-
ing at least two stepper motors simultaneously since
we require the unit to be used for SCARA-like
or Cartesian robot topologies and axles with two in-
dependently driven wheels.
Since a stepper motor requires 4 half-bridge
switches, 8 half-bridge switches in total are re-
quired. BLDC/PMSM requires 3 half-bridge switches
to be controlled and a DC brushed motor requires
2 half-bridge switches (forming a H-bridge). Choos-
ing 8 half-bridge switches is enough for controlling
2 BLDC/PMSM and 4 DC brushed motors as well.
Furthermore, at least 8 PWM outputs for power
switches and at least 8 ADC channels for current mea-
surement are necessary with two counter peripherals
for encoder pulse counting and all the communica-
tion interfaces in paragraph above. Finally, all compo-
nents should operate in industrial temperature range
of at least −40 to 85
◦
C.
ICINCO 2024 - 21st International Conference on Informatics in Control, Automation and Robotics
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2.2 Microcontroller
ATSAMV71Q21B from Microchip, hereinafter ab-
breviated SAMV71 (Microchip, 2023), was cho-
sen as a suitable microcontroller (alternatives are
e.g. series STMicroelectronics STM32H7 or the NXP
imxRT). According to this selection, the control unit
has the label SaMoCon.
The microcontroller core is ARM Cortex M7
with support for single-precision and double-
precision floating point unit, making it feasible to use
alongside pysimCoder generated code with double
64bit type in calculations. The core is running
at 300MHz and features 2MB of Flash memory,
alongside 384kB of SRAM.
This microcontroller features all the desired pe-
ripherals, ranging from Ethernet, to two PWM pe-
ripherals featuring eight channels in total with com-
plementary outputs with configurable deadzones, two
Analog Front End Controller (AFEC) peripherals
each having up to 11 AD channels at disposal and four
TC (Timer/Counter) peripherals with encoder counter
logic. Besides that, CAN peripherals, the HSMCI pe-
ripheral for SD interfacing and many UARTs, SPIs,
TWIHSs (Microchip’s I
2
C) are present too.
3 HW IMPLEMENTATION
AS for the first power stage board prototype, Infineon
IFX007T half-bridge switches (Infineon, 2018) were
selected, see Figure 1. Since the maximum rated volt-
age is 40 V, this first power board has a nominal rating
of 24 V. To reduce the component cost, the common
ground is shared with the MCU board, as no galvanic
isolators are needed.
IFX007T is an all-in-one switch featuring two
N power-switching MOSFETs alongside gate drivers.
It includes built-in high and low-side current lim-
itations alongside over-temperature protection. This
IS
SR
INH
IN
GND
OUT
VS
Gate Driver
HS
Slewrate
Adjustment
Digital Logic
Undervolt.
detection
Overtemp .
detection
Current
Limitation
LS
Current
Limitation
HS
Current
Sense
Gate Driver
LS
LS off HS off
Figure 1: IFX007T structure (Infineon, 2018).
I
L
[A]
I
IS(lim)
I
IS
[mA]
I
CLx
Error Flag Mode
l
o
w
e
r
d
k
I
L
I
S
v
a
l
u
e
h
i
g
h
e
r
d
k
I
L
I
S
v
a
l
u
e
Current Sense Mode
(High Side)
I
IS(offset)
Figure 2: IS output current (Infineon, 2018).
makes the switch very easy to use, as it only requires
one PWM driving signal (IN) and an inhibit (INH)
input controlled by a GPIO.
The half-bridge also has an IS (current-sense)
output whose current is proportional to the current
flowing through the high-side transistor to the load.
The high-side current can then be measured by mea-
suring the voltage drop across the connected resistor.
The IS pin also serves the purpose of a fault indication
in case of over-current or high temperature. The char-
acteristics of IS output current are shown in Figure 2.
Even though the high-side current can be mea-
sured using the IS output, a decision was made
to measure the low-side transistor current using
a shunt connected to ground. However, IS high-side
value was used as an indicator of average current
by connecting a parallel capacitor, and the indicator
of a fault.
As Figure 2 suggests, the fault output current
is bigger than the expected current during normal op-
eration. This way, a fault voltage drop can be com-
pared with a reference on a comparator. Therefore
the comparator with open drain/collector outputs was
chosen for easy chaining with other comparators.
The low-side shunt is used for more precise mea-
surement of the motor winding current. The current
measurement and fault generation scheme is depicted
in Figure 3. If the voltage drop on the R
IS
resistor is
bigger than V
ref
, the comparator output goes low.
Since the operational amplifiers must be con-
nected to the analog ground, the measurement
of the shunt R
S
is done using a differential am-
plifier for R
S
is connected to the power ground,
which is affected by voltage drop caused by high cur-
rents in the power stage.
As the current passing through the transistors can
be negative, a bias voltage is applied to the differen-
tial amplifier, shifting the output voltage of the ampli-
fier. Fast voltage spikes on the R
IS
resistor are filtered
by the parallel C
IS
capacitor.
Motion Control Unit Design for Control Prototyping of Modern BLDC/PMSM Drives and Piezo Actuators
581

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1
-
2
+
3
Comparator
GNDA
R3
R3
+
5
-
6
7
R4
R4
VCC
R2
Cis
GND
1
-
2
+
3
R1
GND
Ris
Rs
LS to MCU
BIAS
Fault
IFX007 GND
IFX007 IS
HS to MCU
REF
1
-
2
+
3
R1
Cis
VCC
R4
R4
+
5
-
6
7
Ris
Figure 3: HS and LS current sensing with fault generation.
The output voltage formulas of the amplifiers are
as follows according to Figure 3:
V
HS
=

1 +
R
1
R
2

R
IS
I
IS
, (1)
V
LS
=
R
4
R
3
R
S
I
RS
+ V
Bias
, (2)
where I
IS
is the current sourced by the IFX007T IS pin
and I
RS
is the current passing through the R
S
shunt,
which is in fact the low-side current.
3.1 MCU Board Implementation
This section briefly describes the implementation
of the upper control MCU board, with all the pe-
ripherals shown in Figure 4. The connection of two
boards is placed on one of the longer sides of the PCB.
Extra GPIOs, SPI, and I
2
C are useful for future exten-
sions. There is another connector on top of the MCU
board with the same mirrored pinout as the lower
interconnection which can be used for expanding
boards placed above the MCU board and as an os-
cilloscope probing place. In the following sections,
the peripherals routed to the separate peripheral con-
nectors on the MCU board will be referred to as main
Ethernet
100 / 10
Mbit
I2C +
3.3 V
USB-C
Host,
Device
UART +
3.3 V
SD Card
2x Hall
trios in
SWD
debug
2x encoder
inputs
SPI + 3 CS
3.3 or 5V
RS232
RS485
2x
CAN FD
Winbond
SPI flash
External GPIOS, PWMs, ADCs, down and up mirror
5V to 3.3V
buck
24xxxx EEPROM
KSZ8081
Ethernet
PHY
2x CAN FD
drivers
Microchip
ATSAMV71Q21B
ARM Cortex M7
@ 300 MHz
2 MB flash
384 kB SRAM
5V power
2.5 V reference
Figure 4: Upper control MCU board with peripherals.
Table 1: Routed peripherals.
SaMoCon Peripheral SAMV7 peripheral
2x CAN MCAN0, MCAN1
SPI main & extra SPI0, SPI1
TTL Console UART3
RS232/RS485 USART2
Ethernet GMAC in RMII mode
USB-C HSUSB
2× IRC TC[0,2] (Timer/Counter)
SD Card HSMCI
H PWM out, Motor A PWM0 CH0-3
L PWM out, Motor A PWM0 CH0-3
H PWM out, Motor B PWM1 CH0, CH1, CH3
L PWM out, Motor B PWM1 CH0-3
8 ADC chn., Motor A AFEC0
8 ADC chn., Motor B AFEC1
3 extra ADC chn. AFEC1
2x 3 Hall inputs GPIOs on the same PIO
I
2
C main & extra TWIHS0, TWIHS1
peripherals whereas the peripherals routed to the in-
terconnection/expanding connector will be referred
to as the extra peripherals.
3.1.1 Microcontroller Pinout
There are many combinations of pin configurations
due to alternative functions of microcontroller pins.
However, for a high count of the desired peripher-
als, conflicts began to occur − two peripheral outputs
or inputs were on the same pin. See Table 1 for routed
peripherals and the corresponding SAMV71 periph-
eral. Each IFX007T half-bridge is controlled by one
PWM H (high-side) signal and one GPIO pin. Even
though we need 8 PWM H outputs, we also route all
remaining PWM L (low-side) outputs, because some
gate drivers require complementary PWM outputs.
In the case of IFX007T, the L output can be config-
ured as a simple output pin.
Unfortunately, the only one H output of PWM1
CH2 could not be routed due to collisions
with the HSMCI peripheral. A decision was
made to route the L channel output as the H channel,
because the PWM polarity can be configured in soft-
ware, resulting in a total of 7 complementary and one
non-complementary output.
3.1.2 MCU-Board Voltage Supplies
All the components on this PCB are powered
from the 5 V or 3.3 V rail. MCU board is de-
signed to be powered from the power board through
the interconnection. The 5V rail can also be sup-
plied from the USB-C connector. A buck regulator
ICINCO 2024 - 21st International Conference on Informatics in Control, Automation and Robotics
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(Texas Instruments TPS562207) is used to convert 5V
to 3.3 V. The CAN and RS232/RS485 peripherals are
galvanically isolated, so 5 V to 5 V small power sup-
plies are used. Also, a stable 2.5 V reference (Mi-
crochip MCP1525) was added for analog measure-
ments.
3.1.3 Ethernet
A Physical Layer (PHY) component was con-
nected to the microcontroller GMAC periph-
eral. The Microchip KSZ8081 IC was used,
working in the RMII mode with specific bit rates
up to 100 Mb/s. The design uses the recommen-
dations from the datasheet (Microchip, 2019)
with compatible magnetics. Communication activity
is indicated by two LED.
3.1.4 USB
The USB-C’s CC1 and CC2 pins are connected
to the Texas Instruments TUSB321 integrated cir-
cuit that negotiates host or device operation, given
voltage levels at certain pins. The data pins are con-
nected to the HSUSB SAMV71 peripheral. The board
was designed to act as a host or a device, using
an AP2171W power switch. If the controller acts
as a host, the enable pin (EN) is set high, enabling
the power switch. If over-current happens, an open
collector FLG output is used to indicate an error.
If connected to a USB power source, the current
passes through a Schottky diode with a low voltage
drop and bypasses the USB power switch, see Fig-
ure 5.
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2024 þÿ©þÿ`tpán Pressl - bachelor thesis at FEE CTU in Prague
Supported and funded by: þÿÚTIAAV þÿR, PiKRON s.r.o.
This work is licensed under CERN-OHL-W.
R50
3.3k
H1
MountingHole
H4
MountingHole
+5V
GNDD
-Vin
1
+Vin
2
-Vout
3
+Vout
4
U17
TEA1-0505
-Vin
1
+Vin
2
-Vout
3
+Vout
4
U18
TEA1-0505
VBUS
GND2
VCOM
C44
100n
GNDD
H2
MountingHole
+3.3V
C35
100n
GNDDGNDD
GNDAGNDD
C34
47u
+3.3V
R51
31k
GNDD
C38
100n
D2
PMEG3010ER,115
+5V
1 2
JP3
JP open
C41
10u
C39
100n
GNDDGNDDOUT
1
GND
2
~{FLG}
3
EN
4
IN
5
U16AP2171W
R49
10k
VIN
1
SW
2
GND
3
BST
4
EN
5
FB
6
U15
TPS562208
C45
100n
C31
22u
C33
100n
GNDDGNDD
GNDD
GND1
+5V
GNDD
H5
MountingHole
H3
MountingHole
GNDA
C43
22u
+3.3V
GNDD
C40
100n
GNDD
GNDA
R52
10k
GNDA
C36
1u
C42
22u
C37
100n
C32
100n
Vin
1
Vout
2
Vss
3
U14
MCP1525-TT
L2
3.3u
GNDA
+5V
GNDD
USB_OVERCURR
ADC_REF
USB_EN
USB_VBUS
Serial Line
CAN
Overcurrent active low (open drain)
Connection of GNDD and GNDA is realised on this PCB
Diode for host and device operation simultaneously
Recommended values TPS562200:
R1 31k
R2 10k
L 3.3u
Cout = 22u + 22u No need to turn off
C37
100n
U14
MCP1525-TT
Vin
1
Vout
2
Vss
3
+3.3V
C36
1u
GNDAGNDA
C34
47u
GNDD GNDD
C35
100n
R50
3.3k
C38
100n
U15
TPS562208
VIN
1
SW
2
GND
3
BST
4
EN
5
FB
6
U16AP2171W
OUT
1
GND
2
~{FLG}
3
EN
4
IN
5
GNDD GNDD
C39
100n
C41
10u
Figure 5: USB power components.
3.1.5 Other Communication Interfaces
The MCU board features two CAN-FD peripher-
als with MCP2562FD transceivers. The board fea-
tures a circuit that either functions as the RS232
or the RS485 interface. The RS232 interface uses
a MAX232 converter and the RS485 uses the ST485
converter. CAN and RS interfaces are both isolated
by the ADuM1201AR isolators.
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2024 þÿ© þÿ`tpán Pressl - bachelor thesis at FEE CTU in Prague
Supported and funded by: þÿÚTIAAV þÿR, PiKRON s.r.o.
This work is licensed under CERN-OHL-W.
GNDD
1
2
3
4
5
6
7
8
J6
NS25-W8P
+5V
1 2
3 4
J7
JP 2 rows
+3.3V
GNDD
GNDD
R43
3.3k
R25 3.3k
C25
100n
+3.3V
2
GND
3
4
VCC
5
U11
74HC1G04GW,125
R36
10k
+3.3V
R37
NC
R38
NC
GNDD
+3.3V
1
10
2
34
56
78
9
J4
DS1013-10SSIB1-B-0
GNDD
R12
2.2k
GNDD
1
2
3
4
J2
NS25-W4P
+3.3V
R11
2.2k
1B
1
3A
10
3Y
11
~{G}
12
4Y
13
4A
14
4B
15
VDD
16
1A
2
1Y
3
G
4
2Y
5
2A
6
2B
7
GND
8
3B
9
U4
AM26LV32xD
+3.3V C24
100n
GNDD
1
10
2
34
56
78
9
J3
DS1013-10SSIB1-B-0
GNDD
+5V
GNDD
R34
10k
GNDD
GNDD
C22
100n
R393.3k
R403.3k
R413.3k
R42
NC
1B
1
3A
10
3Y
11
~{G}
12
4Y
13
4A
14
4B
15
VDD
16
1A
2
1Y
3
G
4
2Y
5
2A
6
2B
7
GND
8
3B
9
U5
AM26LV32xD
GNDD
VDD1
1
VOA
2
VIB
3
GND1
4
GND2
5
VOB
6
VIA
7
VDD2
8
U6
ADuM1201AR
+3.3V
VDD1
1
VOA
2
VIB
3
GND1
4
GND2
5
VOB
6
VIA
7
VDD2
8
U7
ADuM1201AR
GNDD
1
2
3
4
J5
NS25-W4P
+3.3V
GND1
GND1
1
2
3
4
5
J10
NS25-W5P
LOGIC RS232
C1+
1
T2IN
10
T1IN
11
R1OUT
12
R1IN
13
T1OUT
14
GND
15
VCC
16
VS+
2
C1-
3
C2+
4
C2-
5
VS-
6
T2OUT
7
R2IN
8
R2OUT
9
U13
MAX232CSE
VCOM
C27 1u
C301u
C291u
C28
1u
GND1
VCOM
VCOM
GND1
GNDD
CC1
1
GND
10
DIR
11
VDD
12
CC2
2
CURRENT_MODE
3
PORT
4
VBUS_DET
5
~{VCONN_FAULT}
6
OUT1
7
OUT2
8
ID
9
U9
TUSB321
1 2
JP2
R46
820k
47k
R48
47k
GND1
RO
1
~{RE}
2
DE
3
DI
4
GND
5
A
6
B
7
VCC
8
GNDD
GND
1
I/O1
2
I/O2
3
VCC
4
D1
PRTR5V0U2X
1 2
JP1
Jumper 2 open
1
2
GND
3
4
VCC
5
U8
74HC1G08,125
A0
1
A1
2
A2
3
GND
4
SDA
5
SCL
6
WP
7
VCC
8
U3
24AA64
R30
10k
R24
10k
R18
10k
1
2
GND
3
4
VCC
5
U10
74HC1G08,125
VCOM
VCOM
GND1
VCOM
GNDD
R45
47k
VCOM
VCOM
GNDD GNDD
GND
A1
VBUS
A4
CC1
A5
D+
A6
D-
A7
SBU1
A8
CC2
B5
D+
B6
D-
B7
SBU2
B8
SHIELD
S1
J9
USBC Connector
FB1
BLM21PG331SN1D
R47
47k
1
2
J8
NS25-W2P
C26
1u
GND1
R22
10k
R16
10k
GNDD
+5V
R19 3.3k R13 3.3k
GNDD
R15 10k R21 10k
+5V
R28
10k
R33 10k R31 3.3k R27 10k
USART_TX
I2C_SDA
I2C_SCL
SPI_MOSI
USART_RX
SPI_CS1
SPI_CLK
SPI_CS0
SPI_MISO
USB_VBUS
SPI_CS2
USB_D-
USB_D+
USART_RTS
IRCA_ID
IRCA_A
IRCA_MARK
UART_TX
UART_RX
IRCA_B
USB_ID
IRCB_A USART_CTS
IRCB_B
IRCB_MARK
IRCB_ID
485+
485-
I2C
RS232
in case of some failures force usb for device operation
SPI
RS485
UART (TTL Console)
IRC A
PORT on Z: DRP (dual port mode)
ID open drain
R28
10k
R16
10k
R22
10k
GNDD
GNDDU4
AM26LV32xD
1B
1
3A
10
3Y
11
~{G}
12
4Y
13
4A
14
4B
15
VDD
16
1A
2
1Y
3
G
4
2Y
5
2A
6
2B
7
GND
8
3B
9
GNDD
J3
DS1013-10SSIB1-B-0
1
10
2
34
56
78
9
GNDD
+5V
R34
10k
GNDD
GNDD
U5
AM26LV32xD
1B
1
3A
10
3Y
11
~{G}
12
4Y
13
4A
14
4B
15
VDD
16
1A
2
1Y
3
G
4
2Y
5
2A
6
2B
7
GND
8
3B
9
U6
ADuM1201AR
VDD1
1
VOA
2
VIB
3
GND1
4
GND2
5
VOB
6
VIA
7
VDD2
8
+3.3V
J6
NS25-W8P
1
2
3
4
5
6
7
8
J7
JP 2 rows
1 2
3 4
+3.3V
GNDD
C25
100n
+3.3V
U11
74HC1G04GW,125
2
GND
3
4
VCC
5
R36
10k
GNDD
GNDD
J4
DS1013-10SSIB1-B-0
1
10
2
34
56
78
9
GNDD
R30
10k
R24
10k
R18
10k
U10
74HC1G08,125
1
2
GND
3
4
VCC
5
VCOM
VCOM
GND1
VCOM
U8
74HC1G08,125
1
2
GND
3
4
VCC
5
GNDD
J9
USBC Connector
GND
A1
VBUS
A4
CC1
A5
D+
A6
D-
A7
SBU1
A8
CC2
B5
D+
B6
D-
B7
SBU2
B8
SHIELD
S1
FB1
BLM21PG331SN1D
C26
1u
GND1
GND1
U13
MAX232CSE
C1+
1
T2IN
10
T1IN
11
R1OUT
12
R1IN
13
T1OUT
14
GND
15
VCC
16
VS+
2
C1-
3
C2+
4
C2-
5
VS-
6
T2OUT
7
R2IN
8
R2OUT
9
C27 1u
C301u
C291u
C28
1u
GND1
VCOM
VCOM
+3.3V
U9
TUSB321
CC1
1
GND
10
DIR
11
VDD
12
CC2
2
CURRENT_MODE
3
PORT
4
VBUS_DET
5
~{VCONN_FAULT}
6
OUT1
7
OUT2
8
ID
9
JP2
1 2
R48
47k
GND1
GNDD D1
PRTR5V0U2X
GND
1
I/O1
2
I/O2
3
VCC
4
JP1
Jumper 2 open
1 2
Figure 6: Routed optical encoder with HEDL series pinout.
There are also main and extra TWIHS (I
2
C) inter-
faces routed. The main TWIHS peripheral has a Mi-
crochip 24AA64 EEPROM connected and the signals
are routed to a 4 pin Molex connector alongside 3.3 V
and GND. There is an another separate 4-pin Molex
connector for a basic LVTTL console user interface,
with 3.3 V, GND and RX and TX signals.
3.1.6 Feedback from the Actuators
The board has 2 connectors for incremental encoders
and 2 Hall input trios at its disposal. The optical en-
coder connector is compatible with the HEDL en-
coder series with a 2×5 pin socket. The HEDL se-
ries connector incorporates differential two optical
phases, a differential zero-cross index, grounding
and a 5 V power output too.
The differential signals are decoded by the Texas
Instruments AM26LV32 receiver. A so-called mark
signal is used too, acting as another user-defined help-
ful synchronising signal. The scheme of the decoder
circuit is in Figure 6.
Since the voltage level for the inverted signals
in the disconnected state is defined by voltage di-
viders, then an encoder with single-ended outputs can
be connected to the positive inputs. All the inputs
have a pull-up in case of open drain/collector outputs.
The decoded signals from the receiver are connected
to the SAMV71 TC0 and TC2 (Timer/Counter) pe-
ripherals.
The Hall outputs can be read by a GPIO pin.
In our implementation, a standard 5-pin Molex con-
nector (5 V power, GND, and 3 Hall outputs) is used.
In general, the outputs can be either push-pull
or open-drain. However, the 5 V push-pull output
could potentially destroy the microcontroller, mean-
ing precautions must be taken. The way Hall inputs
are routed is shown in Figure 7.
Motion Control Unit Design for Control Prototyping of Modern BLDC/PMSM Drives and Piezo Actuators
583

1 2 3 4 5 6
1 2 3 4 5 6
A
B
C
D
A
B
C
D
Date: 2024-01-17
KiCad E.D.A. 8.0.1
Rev: v1.0.0
Size: A4
Id: 5/6
Title: SaMoCon MCU Controller - Connectivity 2
File: connectors2.kicad_sch
Sheet: /CONNECTORS2/
2024 þÿ©þÿ`tpán Pressl - bachelor thesis at FEE CTU in Prague
Supported and funded by: þÿÚTIAAV þÿR, PiKRON s.r.o.
This work is licensed under CERN-OHL-W.
VDD1
1
VOA
2
VIB
3
GND1
4
GND2
5
VOB
6
VIA
7
VDD2
8
U19
ADuM1201AR
R72
22R
R65
22k
GNDD
C59
22p
L3
1uH
R66
22k
R74
22k
C58
22p
GNDD
R73
22R
+3.3V
GNDD
GND2
+3.3V
GND2
TXD
1
VSS
2
VDD
3
RXD
4
Vio
5
CANL
6
CANH
7
STBY
8
U22
MCP2562-E-SN
GND2
VDD1
1
VOA
2
VIB
3
GND1
4
GND2
5
VOB
6
VIA
7
VDD2
8
U20
ADuM1201AR
VBUS
C62
10u
GNDD
GNDD
C57
22u
+3.3V
C55
100n
L4
470R @ 100 MHz
GNDD
R64
22k
R67
22R
C48
100n
GNDD
GNDD
C60
100n
C61
2.2u
+3.3V
R68
22R
R71
22R
R70
22R
R69
22R
R62
6k49
R55
560R
GNDD
R58
75R
R59
75R
C52
100n
TXD
1
VSS
2
VDD
3
RXD
4
Vio
5
CANL
6
CANH
7
STBY
8
U21
MCP2562-E-SN
R60
120R
GND2
C51
100n
GNDD
GNDD
1
2
3
J13
Conn_01x03
1 2
JP5
JMP 2 Open
1
2
3
J12
Conn_01x03
1 2
JP4
JMP 2 Open
GND2
C50
100n
GND2
VBUS
1
10
11
12
2
3
4
5
6
7
89
SH
J11
RJHSE-5384
GND2
GNDD
RX
TX
1
10
11
14
15
16
2
3
6
7
89
T1
HX1188NL
GND2
R61
120R
+3.3V
GNDD
R56
75R
R57
75R
GNDD
C47
100n
VBUS
GNDD
R54
560R
R53
4k7
C46
1n (2kV)
C49
100n
VBUS
C63
10u
C54
2.2u
R86 1k
R95 1k
R89
1k
R91
1k
D5
D
D7
D
R88
4k7
R85
4k7
R92
1k
1-DAT2
1
2-CD/DAT3
2
3-CMD
3
4-VDD
4
5-CLK
5
6-VSS
6
7-DAT0
7
8-DAT1
8
SW-A
CD
SW-B/GND
G
K1
112J-TDAR-R01
R93
1k
R94
1k
1
2
3
4
5
J14
NS25-W5P
+3.3V
+3.3V
R90
1k
GNDD
D9
3x RB751V-40_R1_00001
R84
4k7
+3.3V
R63
22k
R87
4k7
R82
4k7
D6
D
D4
D
D8
3x RB751V-40_R1_00001
C53
100n
GNDD
GNDD
+3.3V
+5V
+3.3V
+3.3V
R80 1k
R75
22k
R76
22k
1
2
3
4
5
J15
NS25-W5P
+5V
+3.3V
R77 1k
D3
1N4148WS
R79 1k GNDDGNDD
GNDD
1
2
3
4
Y2
3225-25M-SR
VDD_1.2
1
MDIO
10
MDC
11
RXD1
12
RXD0
13
VDDIO
14
CRS_DV/PHYAD[1:0]
15
REF_CLK
16
RXER
17
INTRP
18
TXEN
19
VDDA_3.3
2
TXD0
20
TXD1
21
GND
22
LED0/ANEN_SPEED
23
~{RST}
24
RXM
3
RXP
4
TXM
5
TXP
6
XO
7
XI
8
REXT
9
U23
KSZ8081RNA
GNDD
R78 10k
R83
4k7
C56
2.2u
R81 4k7
HALLA_2
HALLB_2
SD_CLK
HALLA_1
HALLA_0
ETH_LED
SD_DA2
SD_CMD
SD_DA3
SD_DET
CAN1_RX
SD_DA1
SD_DA0
HALLB_0
ETH_MDC
ETH_INT
ETH_EN
ETH_RXER
ETH_MDIO
ETH_CLK
ETH_RX0
ETH_TX1
ETH_RX1
ETH_TX0
ETH_PHYAD
CAN0_RX
CAN0_TX
CAN1_TX
HALLB_1
E_RX+
E_TX-
E_TX+
PHY_RX+
E_RX-
PHY_TX-
PHY_RX-
PHY_TX+
diode for fast shutdown
CAN B
120 R terminator
2.1V forward voltage (at 2 mA)
PHY INT and MDIO require external 1k
HALL B
CAN A
datasheet PHY: pinstate==low => led==high
SD Card slot
120 R terminator
HALL A
Ethernet
K1
112J-TDAR-R01
1-DAT2
1
2-CD/DAT3
2
3-CMD
3
4-VDD
4
5-CLK
5
6-VSS
6
7-DAT0
7
8-DAT1
8
SW-A
CD
SW-B/GND
G
R63
22k
GNDD
U23
KSZ8081RNA
VDD_1.2
1
MDIO
10
MDC
11
RXD1
12
RXD0
13
VDDIO
14
CRS_DV/PHYAD[1:0]
15
REF_CLK
16
RXER
17
INTRP
18
TXEN
19
VDDA_3.3
2
TXD0
20
TXD1
21
GND
22
LED0/ANEN_SPEED
23
~{RST}
24
RXM
3
RXP
4
TXM
5
TXP
6
XO
7
XI
8
REXT
9
Y2
3225-25M-SR
1
2
3
4
+3.3V
GNDD
GNDD
R65
22k
L3
1uH
GND2
U22
MCP2562-E-SN
TXD
1
VSS
2
VDD
3
RXD
4
Vio
5
CANL
6
CANH
7
STBY
8
GND2
R61
120R
+3.3V
R56
75R
J11
RJHSE-5384
1
10
11
12
2
3
4
5
6
7
89
SH
R54
560R
R53
4k7
U21
MCP2562-E-SN
TXD
1
VSS
2
VDD
3
RXD
4
Vio
5
CANL
6
CANH
7
STBY
8
R60
120R
GND2
C50
100n
GND2
VBUS
J12
Conn_01x03
1
2
3
R62
6k49
C52
100n
R59
75R
VBUS
C49
100n
C46
1n (2kV)
GNDD
VBUS
T1
HX1188NL
1
10
11
14
15
16
2
3
6
7
89
GNDD
VBUS
U20
ADuM1201AR
VDD1
1
VOA
2
VIB
3
GND1
4
GND2
5
VOB
6
VIA
7
VDD2
8
+3.3V
GNDD
+3.3V U19
ADuM1201AR
VDD1
1
VOA
2
VIB
3
GND1
4
GND2
5
VOB
6
VIA
7
VDD2
8
GNDD
C58
22p
C59
22p
GNDD
R72
22R
R73
22R
R69
22R
R70
22R
R71
22R
R68
22R
+3.3V
R67
22R
L4
470R @ 100 MHz
+3.3V
+3.3VD3
1N4148WS
GNDD
R81 4k7
+3.3V
D7
D
R88
4k7
R85
4k7
R92
1k
R93
1k
R94
1k
R84
4k7
R87
4k7
R82
4k7
D8
3x RB751V-40_R1_00001
D6
D
+3.3V
D9
3x RB751V-40_R1_00001
R90
1k
R91
1k
R89
1k
+3.3V
R83
4k7
Figure 7: Open drain/collector output: the output is 3.3 V
or GND due to the pull-up to 3.3 V. Push-pull: the voltage
limitation is done by shorting the output to 3.3 V through
diodes. The shorting current is limited by series resistors.
3.1.7 Interconnection Pinout
The interconnection between the two boards is re-
alized by a standard 2×32 header pin connector
with a 2.54 mm pitch. The MCU board contains
the pin connector heading down towards the power
board and a socket heading up. The pinouts of these
connectors are the same, mirrored only, and are
of SMD type, allowing us to route tracks in the inner
layers.
Some pins provide the 5 V source and the power
digital ground to power the MCU board. In gen-
eral, the power board may contain 3.3 V powered
circuits, so we need to route 3.3 V too, as well
as the 2.5 V reference. The lower board may also con-
tain analog circuitry so we route the analog ground
too. The connection of the analog and digital ground
is done on the MCU board nearby the ADC reference
and ground pins.
All 15 (7 complementary and one non-comple-
mentary) PWM outputs must be routed alongside 16
ADC channels (IFX007 high and low side sensing)
for two motors. An extra I
2
C, GPIOs and SPI or 3 ex-
tra ADC channels are routed too.
3.2 Power Stage Board Implementation
As already discussed during the analysis, the power
board also serves the purpose of a step-down to 5 V.
The rated current per phase is a continuous 10 A
minimum, achieving a 20 A peak is possible too.
The board must perform the current measurement
and amplification. These analog signals are then pro-
cessed by the MCU board placed above. The power
board is in Figure 8.
The power to the half-bridge switches is routed
on the PCB upper side, while the outputs are routed
on its back side. The IFX007 output with an ex-
posed solder pad is connected to a high area cop-
per, on which a heatsink can be placed to cool down
the switches.
4 phases A
4 phases B
5 V power out,
PWM inputs,
output of opamps
GND, VPWR, VCTRL
24 V to 5V buck
Pair of 4
Infineon IFX007s
Half bridges with
integrated HS and
LS drivers
Opamps for current
measurement of HS
and LS switches.
Comparators used
for fault signal
generation. 2x
MCP6022
MCP6022
LM2903
LM2903
MCP6022
MCP6022
Figure 8: Power stage board
3.2.1 Power Components
The power board features a 3-pin power connector,
one pin being the common ground pin, the other
ones are the positive voltage rails, one for the MCU
board, and the other for the motors. The used
buck regulator IC is AOZ1284, used in accordance
with the datasheet’s recommendations. The total
power consumption of the MCU board is supposed
around 0.5A, the MCU board’s USB power switch
handles 1A continuous at maximum and we suppose
the expanding board consumes another 1A. The IC
provides up to 4A, enough for our requirements.
All the analog circuitry powered from 5 V or 3.3 V
(provided by the MCU board) is first filtered
with an LC filter. The power rail for the IFX007
switches contains decoupling electrolytic capacitors.
3.2.2 Low Side Shunt Current Measurement
Let us consider the formula (2). Let V
Bias
be 1.25V,
in the middle of the voltage reference. This volt-
age is obtained by choosing a 1:1 voltage divider
with a buffer to lower the output impedance of the di-
vider. R
s
was chosen to be 10mΩ because higher
resistance values would lead to big power losses.
The power loss of this at 10 A is 1 W, so a 3 W
2512 resistor has been chosen. To use the whole
ADC bandwidth, we amplify the voltage by at least
10×. This can be achieved by setting R
3
= 1 kΩ
and R
4
= 10kΩ.
3.2.3 IS Current Measurement
Since the IFX007T IS output indicates a fault, we
need to set the threshold value first which should
equal to the point where I = 20 A. Referring to Ta-
ble 11 in (Infineon, 2018), the maximum analog sense
current in fault condition is I
IS(lim)
= 6.1mA. To be
sure, the voltage drop on R
IS
must not be higher than
3.3 V to not damage the operational amplifier, pow-
ered from the 3.3 V rail. We choose a R
IS
= 510 Ω
resistor from the E24 series. The maximum voltage
ICINCO 2024 - 21st International Conference on Informatics in Control, Automation and Robotics
584

drop across this resistor is
V
IS(lim)
= 3.111V < 3.3V. (3)
The differential current sense ratio in static on-
condition is on average (Infineon, 2018)
dI
L
dI
S
= 19500. (4)
Then, a threshold value for the comparator at I = 20A
can be computed as follows:
V
th
=
20
19500
510V = 0.52V. (5)
Since the differential ratio varies significantly and it
also has a non-negligible offset, we set V
th
= 0.655 V,
provided by a divider made out of 2.2 kΩ and 6.2 kΩ
resistors. This compare value is again amplified
by a buffer to lower the output impedance.
The last value that needs to be set is C
IS
.
This value was supposed to be in the range of hun-
dreds of pF, so only the high-frequency noise would
be filtered. Unfortunately, during testing, we spotted
a high fault rate on the comparator’s output due to fast
voltage spikes on R
IS
which were always caused after
switching off the PWM signal. The reasons of this
problem are unknown to us and will require further
investigation. Currently C
IS
is 22 nF, as a trade-off
between suppressing the spikes and fast-rising times.
3.2.4 Analog Components
Used operational amplifiers are Microchip MCP6022,
a low offset and rail-to-rail operational amplifier.
The used comparator is Texas Instruments LM2903,
a dual differential comparator with open-drain out-
puts. That means all comparators from 4 half bridges
can be chained together. If at least one switch faults,
the line goes low. Finally, the complete motion con-
trol unit is shown in Figure 9 assembled of MCU
and power boards. This ends the issue of HW design
and implementation.
Figure 9: Connected boards forming the controller.
4 NuttX AND pysimCoder
This section briefly introduces NuttX and its adapta-
tion to the SaMoCon hardware and pysimCoder suite.
NuttX is an open-source real-time operating sys-
tem written in C and released under Apache 2.0
license was introduced by Gregory Nutt in 2007,
(ASF, 2023). Currently, the project is maintained
on GitHub (ASF, 2024c). The primary governing
standards in NuttX are POSIX and ANSI standards
(ASF, 2024a).
Since NuttX aims to conform to Portable Op-
erating System Interface (POSIX) (Group, 2024),
all the interaction with the microcontroller periph-
erals is done by accessing the peripherals’ regis-
tered /dev files (for example, an AD converter may
be registered as /dev/adc0). The files are ac-
cessed using system calls like open, close, read
or write. As many peripherals do not share many
similarities with each other, ioctl calls are com-
monly used to change the underlying device pa-
rameters. The project’s directory structure is similar
to the Linux Kernel’s one (Torvalds, 2024), as well as
the process of configuration and building. The project
must be first configured by choosing Kconfig options
and then built using make or CMake.
4.1 NuttX Adaptation
To build NuttX, a custom BSP (board sup-
port package) is needed. The samv71-xult BSP
for the SAMV71 Xplained Ultra Evaluation Kit was
used as the baseline. Multiple source files were added
to initialize and register the peripherals, the most
important are AD converters (/dev/adc0,1), PWM
(/dev/pwm0,1), quadrature decoders of rotary en-
coders (/dev/qe0,1) and GPIOs for HALL reading
and IFX007T INH activation.
Furthermore, the NuttX build needs to be con-
figured so all the peripherals work properly, i.e.
console driver to output on the SAMV71 UART3
peripheral; SAMV71 GMAC peripheral to com-
municate with the KSZ8081 PHY and enabling
the UDP/IP and TCP/IP, alongside helper applications
like ping or telnet. Also the SAMV71 quadrature
decoder, PWM and ADC drivers needed to be con-
figured. Changes to SAMV71 quadrature decoder
and PWM drivers were made, which also made it
into the GitHub mainline repository.
By default, a NuttX configuration uses a pe-
riodic timer interrupt that drives all system tim-
ing. The timer is provided by architecture-spe-
cific code that calls into NuttX at a rate con-
trolled by CONFIG USEC PER TICK. The default value
Motion Control Unit Design for Control Prototyping of Modern BLDC/PMSM Drives and Piezo Actuators
585

of CONFIG USEC PER TICK is 10000 microseconds
which corresponds to a timer interrupt rate of 100Hz
((ASF, 2024b), Tickless OS). This configuration must
be turned on for control applications because it in-
troduces a freerunning timer, where each counter
increment corresponds to the smallest measurable
time slice. If time slice is small, high precision de-
lays can be made, useful in a fast periodic sampling
of the pysimCoder-generated real-time applications.
4.2 Introduction to pysimCoder
PysimCoder is an open-source rapid control ap-
plication development tool designed by Professor
Roberto Bucher from the University of Applied Sci-
ences and Arts of Southern Switzerland, (Bucher,
2024). It uses an extended python-control library
for the integration of methods as full or reduced state
space observer, anti-windup mechanism and discrete
linear quadratic regulator. Apart from that, pysim-
Coder offers a graphical editor with a code genera-
tor. This combination allows the user to design the de-
sired application graphically using predefined blocks
and then generate a C code that can be run on target
hardware. Details and pysimCoder setup and compi-
lation is in (Lenc et al., 2023).
PysimCoder supports code generation for var-
ious platforms using custom APIs, like STMi-
croelectronic’s STM32H7, Microchip SAMD21,
or Linux. Simulations of control systems can be done
if the code is generated for Linux. In the con-
text of this paper, the ability of code generation
for the OSIX-compatible NuttX RTOS is more impor-
tant. As with NuttX, the generated code runs in a high-
priority task, with a periodic control loop. The sam-
pling time of the control loop can be set in pysim-
Coder GUI before the code generation. Runtime
monitoring and tuning of model parameters that al-
low the user to display and edit parameters, inputs,
and outputs of individual blocks, is solved using Sili-
con Heaven infrastructure (SHV) (Elektroline, 2024)
and (Lenc et al., 2023).
5 pysimCoder APPLICATIONS
This section presents the control applications and its
pysimCoder diagrams. The behavior of the con-
trol system can be remotely tuned using the Sili-
con Heaven protocol, like the references or the val-
ues of the PID controllers. Unfortunately, the cur-
rent build of NuttX is only capable of achieving sam-
pling rates below 1kHz, probably due to the NuttX
scheduler limitations or a long-lasting interrupt, mak-
Figure 10: The control unit with a PMSM and an unused
DC motor serving as a brake.
ing it unusable for the control of fast-moving sys-
tems or the field oriented control. This issue will re-
quire further investigation in the future. Fortunately,
there are ways to debug the control applications, ei-
ther using the low-level ARM Cortex-M profiling fea-
tures using the Instrumented Trace Macrocell or using
NuttX internal profiling tools (ASF, 2023).
The purpose of this section is to show that pysim-
Coder is ready to create control applications, even
the ones used for PMSM field oriented control,
as well as its logging capabilities.
5.1 Control of PMSM
The unit connected to PMSM is shown in Fig-
ure 10. The parameters of the used PMSM are in Ta-
ble 2. The PMSM was tested simply in (Belda and
P
´
ı
ˇ
sa, 2021). Despite the sampling issues, a diagram
of the current PI controller of dq axes is presented,
showing that pysimCoder is ready to create FOC ap-
plications. Afterward, we present a simple non-vector
PMSM control.
5.1.1 Current Controllers
To verify and tune current PI control, synchronous
current-constant mode is used (see diagram Fig-
ure 11). The rotor is rotated in a synchronous way by
generating an angle from an integrating angular ve-
Table 2: Parameters: PMSM BLWR233D-36V-4000
Symbol Description Value
P rated power 95W
R
S
stator resistance 0.64Ω
L
S
stator inductance 0.0021 H
Ψ
M
PM rotor magnetic flux 0.0200077 Wb
B viscous friction coef. ≈ 0kgm
2
s
−1
p number of pole pairs 4
J moment of inertia 1.2·10
−5
kgm
2
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586

u
d
u
q
dq
αβ
αβ
abc
u
α
u
β
NuttX
PWM
PMSM
u
a
u
b
u
c
PI
PI
αβ
dq αβ
abc
NuttX
ADC
i
a
i
b
i
c
Op. Amps

ω
const
i
q,ref
= 0
i
d,ref
ϕ
i
q
i
d
Shunts
ClarkePark
Inv. Park Inv. Clarke
Figure 11: A simplified diagram of current controllers.
Timer
QRef
PWM3
PWM1
PWM0
ADC
SubQ
SubD
PIDQ
PIDD
L3toI3
L1toI1
L0toI0
L3off
L1off
ForwardPark
ForwardClarke
PWM
InversePark
InverseClarke
SubL0
SubL1
SubL2
L0off
EnablePWM
AngularVelocity
Integral
PulseGenerator
UDPTx
Figure 12: PysimCoder diagram of dq current control.
locity (see the integrator) while applying action only
in the d-axis, while q-axis action is zero. The an-
gular velocity must be set low. The measured cur-
rents i
a
, i
b
and i
c
are acquired by reading the volt-
age drop on the current shunts with an AD converter.
These readings are recalculated to obtain the i
q
and i
d
currents using the Clarke and Park transformations.
The angle used in the Park transformation comes
from the integrator.
These quantities are subtracted from the ref-
erences and passed to inner PI controllers. After-
ward, the Inverse Park and Inverse Clarke transfor-
mations are used to obtain the actions used to con-
trol the IFX007 switches. The angle used in the In-
verse Park transformation is also from the integra-
tor. The implementation in pysimCoder is depicted
in Figure 12. In this figure, the ADC outputs are also
passed to subtract and gain blocks, mapping an ADC
number to the real currents using linear regression.
The calibration procedure was done beforehand by fit-
ting measured data using a custom Python script.
0 1 2 3 4
t [s]
0.0
0.5
1.0
1.5
i [A]
i
d
i
q
i
d,ref
Figure 13: The PI dq currents control, i
q,ref
= 0.
The output of the reference i
d,ref
and measured
i
d
and i
q
currents is sent by using a NuttX UDP
Socket to a given IP address, which can be configured
in the block itself. Using the Silicon Heaven protocol,
the user can tune the constants of the PI controllers
remotely while watching the changing waveforms.
Figure 13 presents the captured data visualisation.
5.1.2 Simple Closed-Loop Control
A simplified diagram of the closed-loop control
is shown in Figure 14. The difference between the tar-
get and the current incremental encoder count (NuttX-
specific block) goes into the PID controller, setting
the q-axis action for the highest torque while the d
input is set to zero. The inverse Park transformation
requires the rotor angle to be estimated. This is per-
formed by the electrical angle estimation block using
current IRC count and Hall sensors.
The realisation of this control diagram in pysim-
Coder is shown in Figure 15. The Hall To 6 Sectors
block reads the GPIOs (NuttX-specific) of the Hall
outputs and transforms them into the 6 sectors (a sim-
ple integer). The Encoder block outputs the current
encoder count (C) the encoder count of the last hit
index (C
I
) and the number of hit indexes. The angle
estimation is performed by the PMSM Align block.
When the number of hit indexes is zero, the estima-
tion is done only using Hall sensors, and the block
outputs multiples of π/3. When a first index is hit,
Target
IRC
0
u
d
u
q
dq
αβ
αβ
abc
u
α
u
β
NuttX
PWM
PMSM
Current IRC
u
a
u
b
u
c
Electrical Angle
Estimation
(PMSM Align)
3 Hall to 6 Sectors
PID
ϕ
Inv. Park
Inv. Clarke
Figure 14: A simplified diagram of the closed-loop control.
Motion Control Unit Design for Control Prototyping of Modern BLDC/PMSM Drives and Piezo Actuators
587

Rise Sub 0
PWMInverse Clarke
Hall to 6 Sectors
NULL
Discrete PID
HALL_A
HALL_B
HALL_C
Inverse Park
PWM_B_EN
PWM_C_EN
PWM_A_EN
Enable PWM
D Zero
Feedback Sub
Electrical Angle Estimation
Encoder
Align reset
Control Mode Switch
Pulse Generator
Int Switch
Int Sum
Integral
Pulse or Int Control
Max Rise
Rise Sub 1
Delay
Ramp Slope
Zero
Timer
Gain
UDP Tx
0
PMSM
Align
Figure 15: PysimCoder of the closed-loop control diagram with a selectable reference.
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
t [s]
0
1000
2000
3000
4000
Position [IRC]
−100
−75
−50
−25
0
25
50
75
100
PWM [%]
Cur.Pos
Ref. Pos
PWM
Figure 16: The step response to 4000 encoder counts.
the following formula is used:
ϕ
Est
=
C −C
I
C
Turn
2π + ϕ
Offset
, (6)
where C
Turn
denotes the number of encoder counts per
one electrical turn and ϕ
Offset
denotes an offset be-
tween the start of electrical angle and index. Values
C
Turn
and C
Offset
must be set in the PMSM Align block.
The diagram in Figure 15 also features a selectable
reference between a ramp and a step. The reference
is chosen by setting the constant remotely using Sili-
con Heaven (Lenc et al., 2023).
Furthermore, the rise time of the ramp is limited
with a saturated sumator. Again, this diagram features
a NuttX UDP Socket sending the PID action, the ref-
erence, and the actual position. Figure 16 shows a step
response of the used motor.
5.2 Control of a Piezoelectric Actuator
This section presents a simple pysimCoder diagram
capable of controlling a piezo actuator P-871.140, (PI,
Table 3: Parameters: PL140 - PIC251
Symbol Description Value
l
t
length 40 mm
w width 11 mm
d thickness 0.55 mm
c capacitance 8.2 µF
u
rated
rated voltage range ±30 V
z
f
free deflection at u
rated
±1 mm
f
b
blocking force at u
rated
±0.5 N
f
n
first natural frequency 160 Hz
2008). The parameters of this piezo bender actuator
are listed in Table 3, where the used piezo material
is PIC251 ceramic. The purpose is to demonstrate
simple control applications that can be quickly de-
veloped in research environments. Despite this actua-
tor having a tensometer, an optical approach has been
chosen as proof of the movement. There is a mirror
placed at the tip of the actuator. If this place is illumi-
nated by a laser beam, the incidence angle changes,
thus the reflection angle changes too. The experiment
setup is shown in Figure 17.
The piezo actuator is controlled by a linear volt-
age. In our case, we have constructed an LC low-
pass filter, turning the PWM voltage into a DC voltage
which depends on the duty. Although the power board
supplies 24 V at most, this voltage was used for initial
tests, despite the rated voltage range of the piezo actu-
ator. The pysimCoder diagram is shown in Figure 18.
The only block that is to be controlled over Silicon
Heaven is the CONST block with the Duty descrip-
tion in the range of [-1, 1].
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588

Figure 17: Experimental unit with piezo bender actuator P-871.140.
LTI
VCC
EnINH
PWM
INH1
INH0
Duty
Saturation
Figure 18: Inputs and outputs of piezo bender actuator.
6 CONCLUSIONS
This paper introduces the design of an extensible pro-
totyping unit with an emphasis on motion control
of modern BLDC/PMSM drives and piezo actuators.
Proposed power stage is rated up to 24 V.
The hardware was successfully tested with pysim-
Coder with generated code running on NuttX real-
time operating system including remote tuning model
parameters using Silicon Heaven. The adaptations
of NuttX peripheral drivers for the platform have
been merged by NuttX maintainers into the main-
line repository. We have observed limits of maximum
achievable sampling frequency of the NuttX sched-
uler, which requires future investigation.
Despite the indicated issues, we demonstrated
the advantage of open-source and block-based graph-
ical environment pysimCoder that control applica-
tions can be created very quickly without writing
code. It was proven in the simple PID PMSM con-
trol and the piezo actuator control. Compared to fully
professional commercial solutions for universal use,
e.g. dSPACE, the presented solution is feasible
with components at an affordable cost and free open
source software. In addition, other operating sys-
tems like Zephyr and RTEMS support the selected
family of SAMV71 microcontrollers as well. Thus,
they represent another alternatives for real-time con-
trol applications. In the future, the adequate selection
of the operating system is important for the sampling
frequency.
Hardware and pysimCoder model diagrams are avail-
able in the public repository:
https://gitlab.fel.cvut.cz/otrees/motion/samocon
ACKNOWLEDGEMENTS
This work was supported by The Czech Academy
of Sciences, Institute of Information Theory and Au-
tomation under project No. 23-04676J of the Czech
Science Foundation: Controllable Gripping Mechan-
ics: Modelling, Control and Experiments.
Motion Control Unit Design for Control Prototyping of Modern BLDC/PMSM Drives and Piezo Actuators
589

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