Capacity Analysis of Radio Frequency Interconnect for Manycore Processor Chips

Eren Unlu, Christophe Moy, Yves Louet, Jacques Palicot

2016

Abstract

We study here the case of a 2048 cores chip, where cores are spread into 32 tilesets of 16 tiles containing 4 cores each. Each of the 32 tilesets has a RF access point to the serpentine transmission line across the chip. Inside tilesets, a 2-D mesh is used between the 16 tiles where a crossbar switch joints 4 cores, one RAM block and one DMA unit. Total 1 Terabytes memory is physically distributed into all tiles but logically shared between all cores and managed by a distributed hybrid cache coherency protocol (DHCCP). From the RFNoC point of view, a 20 GHz bandwidth between 20 and 40 GHz is shared into 1024 carriers between all 32 RF access nodes. The novelty of our work is that we have derived, in previous publications, algorithms able to dynamically share the RF resources between the 32 nodes. It has been stated by simulations that the channel transfer function is flat in the 20-40 GHz frequency band and just depends on the distance between nodes. The scope of this paper is to make a capacity analysis on the different links between nodes and to derive mean capacity evaluation of the RF NoC. We state that only -42 dBm of transmission power on the RF line is necessary to reach a 6 bits/s/Hz spectral efficiency.

References

  1. Borkar, S., “Thousand core chips: a technology perspective,” in Proceedings of the 44th annual Design Automation Conference. ACM, 2007, pp. 746-749.
  2. Olukotun, L., K. Hammond, and J. Laudon, “Chip multiprocessor architecture: techniques to improve throughput and latency,” Synthesis Lectures on Computer Architecture, vol. 2, no. 1, pp. 1-145, 2007.
  3. Cota, E., A. de Morais Amory, and M. S. Lubaszewski, Reliability, Availability and Serviceability of Networks-on-chip. Springer, 2011.
  4. Pasricha S., and N. Dutt, On-chip communication architectures: system on chip interconnect. Morgan Kaufmann, 2010.
  5. Deb, S., “Millimeter-wave wireless network-on-chip: A cmos compatible interconnection infrastructure for future many-core processors,” Ph.D. dissertation, Washington State University, 2012.
  6. Brìere, A., J. Denoulet, A. Pinna, B. Granado, F. Pˆecheux, E. Unlu, Y. Loüet, and C. Moy, “A dynamically reconfigurable rf noc for manycore,” in Proceedings of the 25th edition on Great Lakes Symposium on VLSI. ACM, 2015, pp. 139-144.
  7. Kurian, G., J. E. Miller, J. Psota, J. Eastep, J. Liu, J. Michel, L. C. Kimerling, and A. Agarwal, “Atac: a 1000-core cache-coherent processor with on-chip optical network,” in Proceedings of the 19th international conference on Parallel architectures and compilation techniques. ACM, 2010, pp. 477-488.
  8. Hamieh, M., M. Ariaudo, S. Quintanel, and Y. Loüet, “Sizing of the physical layer of a rf intra-chip communications,” in Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on. IEEE, 2014, pp. 163-166.
  9. Shannon, C. E. “A mathematical theory of communication,” ACM SIGMOBILE Mobile Computing and Communications Review, vol. 5, no. 1, pp. 3-55, 2001.
  10. Shankar, P. M. Introduction to wireless systems. Wiley New York, 2002.
  11. Goldsmith, A. Wireless communications. Cambridge university press, 2005.
Download


Paper Citation


in Harvard Style

Unlu E., Moy C., Louet Y. and Palicot J. (2016). Capacity Analysis of Radio Frequency Interconnect for Manycore Processor Chips . In Proceedings of the Fifth International Conference on Telecommunications and Remote Sensing - Volume 1: ICTRS, ISBN 978-989-758-200-4, pages 71-77. DOI: 10.5220/0006227300710077


in Bibtex Style

@conference{ictrs16,
author={Eren Unlu and Christophe Moy and Yves Louet and Jacques Palicot},
title={Capacity Analysis of Radio Frequency Interconnect for Manycore Processor Chips},
booktitle={Proceedings of the Fifth International Conference on Telecommunications and Remote Sensing - Volume 1: ICTRS,},
year={2016},
pages={71-77},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0006227300710077},
isbn={978-989-758-200-4},
}


in EndNote Style

TY - CONF
JO - Proceedings of the Fifth International Conference on Telecommunications and Remote Sensing - Volume 1: ICTRS,
TI - Capacity Analysis of Radio Frequency Interconnect for Manycore Processor Chips
SN - 978-989-758-200-4
AU - Unlu E.
AU - Moy C.
AU - Louet Y.
AU - Palicot J.
PY - 2016
SP - 71
EP - 77
DO - 10.5220/0006227300710077