A Metamodel and Model-based Design Rule Checking DSL for Verification and Validation of Electronic Circuit Designs

Adrian Rumpold, Bernhard Bauer

2019

Abstract

Development of embedded systems depends on both software and hardware design activities. Quality management of development artifacts is of crucial importance for the overall function and safety of the final product. This paper introduces a metamodel and model-based approach and accompanying domain-specific language for validation of electronic circuit designs. The solution does not depend on any particular electronic design automation (EDA) software, instead we propose a workflow that is integrated into a modular, general-purpose model analysis framework. The paper illustrates both the underlying concepts as well as possible application scenarios for the developed validation domain-specific language, MBDRC (Model-Based Design Rule Checking). It also discusses fields for further research and transfer of the initial results.

Paper Citation

in Harvard Style

Rumpold A. and Bauer B. (2019). A Metamodel and Model-based Design Rule Checking DSL for Verification and Validation of Electronic Circuit Designs.In Proceedings of the 7th International Conference on Model-Driven Engineering and Software Development - Volume 1: MODELSWARD, ISBN 978-989-758-358-2, pages 317-324. DOI: 10.5220/0007381303170324

in Bibtex Style

@conference{modelsward19,
author={Adrian Rumpold and Bernhard Bauer},
title={A Metamodel and Model-based Design Rule Checking DSL for Verification and Validation of Electronic Circuit Designs},
booktitle={Proceedings of the 7th International Conference on Model-Driven Engineering and Software Development - Volume 1: MODELSWARD,},
year={2019},
pages={317-324},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0007381303170324},
isbn={978-989-758-358-2},
}

in EndNote Style

TY - CONF

JO - Proceedings of the 7th International Conference on Model-Driven Engineering and Software Development - Volume 1: MODELSWARD,
TI - A Metamodel and Model-based Design Rule Checking DSL for Verification and Validation of Electronic Circuit Designs
SN - 978-989-758-358-2
AU - Rumpold A.
AU - Bauer B.
PY - 2019
SP - 317
EP - 324
DO - 10.5220/0007381303170324