Designing of ALU Block for RISC-V-Based Processor Core with Low Power

K. Rao, T. Vasudeava Reddy, Uthej

2023

Abstract

We are in an era of technology where the speed, power, and area of the VLSI chip are the three extremely crucial factors. Adders and multipliers form key components in a variety of arithmetic and logical processes. For binary addition, Parallel Prefix Adder (PPA) is an effective and useful circuit that has evolved. Fast Kogge-Stone Adder (KSA) is Parallel Prefix Adder that is used for making fast addition operations. A Galois Filed Multiplier (GFM) is also developed for making fast operations that work on shift operation technique. The objective of the research is to integrate FKS and GFM that accommodate superior systems to improvise a performance. Both of these modules are integrated into an ALU block of the RISC V processor. The design has been implemented for a 32-Bit sequence. and the entire design was implemented in Xilinx ISE and Open Lane toolset.

Paper Citation

in Harvard Style

Rao K., Vasudeava Reddy T. and Uthej. (2023). Designing of ALU Block for RISC-V-Based Processor Core with Low Power. In Proceedings of the 1st International Conference on Artificial Intelligence for Internet of Things: Accelerating Innovation in Industry and Consumer Electronics - Volume 1: AI4IoT; ISBN 978-989-758-661-3, SciTePress, pages 71-76. DOI: 10.5220/0012559700003739

in Bibtex Style

@conference{ai4iot23,
author={K. Rao and T. Vasudeava Reddy and Uthej},
title={Designing of ALU Block for RISC-V-Based Processor Core with Low Power},
booktitle={Proceedings of the 1st International Conference on Artificial Intelligence for Internet of Things: Accelerating Innovation in Industry and Consumer Electronics - Volume 1: AI4IoT},
year={2023},
pages={71-76},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0012559700003739},
isbn={978-989-758-661-3},
}

in EndNote Style

TY - CONF

JO - Proceedings of the 1st International Conference on Artificial Intelligence for Internet of Things: Accelerating Innovation in Industry and Consumer Electronics - Volume 1: AI4IoT
TI - Designing of ALU Block for RISC-V-Based Processor Core with Low Power
SN - 978-989-758-661-3
AU - Rao K.
AU - Vasudeava Reddy T.
AU - Uthej.
PY - 2023
SP - 71
EP - 76
DO - 10.5220/0012559700003739
PB - SciTePress