High Throughput Neural Network for Network Intrusion Detection on FPGAs: An Algorithm-Architecture Interaction
Muhammad Ali Farooq, Muhammad Ali Farooq, Syed Muhammad Fasih Ul Hassan, Muhammad Umer Farooq, Abid Rafique, Abid Rafique
2024
Abstract
With the increasing digitization of human activities, the risk of cyberattacks has increased. The resulting potential for extensive harm underscores the need for robust detection mechanisms. Neural network-based solutions deployed on FPGAs provide robust and fast solutions to this challenge by scrutinizing network traffic patterns to identify malicious behaviours. This paper introduces a novel loss function tailored for use on the UNSW-NB15 dataset. This loss function allows a small, binarized neural network deployed on FPGAs to function at high speed with competitive accuracy. This paper further introduces a model trained using this method which has a maximum operating frequency of 1.028 GHz and LUT and flip-flop usage of 135 and 148 respectively, with an accuracy of 90.91% and an F1 score of 91.81%. The high operating frequency and low LUT footprint provide avenues for further research, even though the accuracy and F1 score are not groundbreaking.
DownloadPaper Citation
in Harvard Style
Farooq M., Fasih Ul Hassan S., Farooq M. and Rafique A. (2024). High Throughput Neural Network for Network Intrusion Detection on FPGAs: An Algorithm-Architecture Interaction. In Proceedings of the 10th International Conference on Information Systems Security and Privacy - Volume 1: ICISSP; ISBN 978-989-758-683-5, SciTePress, pages 423-429. DOI: 10.5220/0012367800003648
in Bibtex Style
@conference{icissp24,
author={Muhammad Ali Farooq and Syed Muhammad Fasih Ul Hassan and Muhammad Umer Farooq and Abid Rafique},
title={High Throughput Neural Network for Network Intrusion Detection on FPGAs: An Algorithm-Architecture Interaction},
booktitle={Proceedings of the 10th International Conference on Information Systems Security and Privacy - Volume 1: ICISSP},
year={2024},
pages={423-429},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0012367800003648},
isbn={978-989-758-683-5},
}
in EndNote Style
TY - CONF
JO - Proceedings of the 10th International Conference on Information Systems Security and Privacy - Volume 1: ICISSP
TI - High Throughput Neural Network for Network Intrusion Detection on FPGAs: An Algorithm-Architecture Interaction
SN - 978-989-758-683-5
AU - Farooq M.
AU - Fasih Ul Hassan S.
AU - Farooq M.
AU - Rafique A.
PY - 2024
SP - 423
EP - 429
DO - 10.5220/0012367800003648
PB - SciTePress